diff options
| author | Julian Schroeder <julianmarcusschroeder@gmail.com> | 2022-01-20 15:09:52 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-11 20:40:49 +0000 |
| commit | d2e278df334f85a2ec2001fe2c477ceb186a565b (patch) | |
| tree | 03d055b19e99791c9ccb6a5a4ea95eb16698ded8 /src/vendorcode | |
| parent | 3a96074441c4e2b28d6d6961b94fec5c4eada8ec (diff) | |
soc/amd/common/fsp: check fsp image revision
Check if FSP binary and coreboot FSP structures (fspmupd.h) match
sufficiently.
A change in minor number denotes less critical changes or additions
to the FSP API that still allow for the boot process to proceed.
A change of the AMD image revision major number will halt boot.
The Fspmupd.h header now defines IMAGE_REVISION_ macros for AMD
Picasso, Cezanne and Sabrina APUs.
BUG=b:184650244
TEST=build, boot and check fsp image revision info. Example:
FSP major = 1
FSP minor = 0
FSP revision = 5
FSP build = 0
Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I0fbf9413b0cf3e6093ee9c61ff692ff78ebefebc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/amd/fsp/cezanne/FspmUpd.h | 6 | ||||
| -rw-r--r-- | src/vendorcode/amd/fsp/picasso/FspmUpd.h | 5 | ||||
| -rw-r--r-- | src/vendorcode/amd/fsp/sabrina/FspmUpd.h | 5 |
3 files changed, 16 insertions, 0 deletions
diff --git a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h index 7cee318126..38aa36cb07 100644 --- a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h +++ b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h @@ -114,4 +114,10 @@ typedef struct __packed { /** Offset 0x0040**/ FSP_M_CONFIG FspmConfig; } FSPM_UPD; +#define IMAGE_REVISION_MAJOR_VERSION 0x01 +#define IMAGE_REVISION_MINOR_VERSION 0x00 +#define IMAGE_REVISION_REVISION 0x05 +#define IMAGE_REVISION_BUILD_NUMBER 0x00 + + #endif diff --git a/src/vendorcode/amd/fsp/picasso/FspmUpd.h b/src/vendorcode/amd/fsp/picasso/FspmUpd.h index 28b000bb13..abb61acb4c 100644 --- a/src/vendorcode/amd/fsp/picasso/FspmUpd.h +++ b/src/vendorcode/amd/fsp/picasso/FspmUpd.h @@ -79,4 +79,9 @@ typedef struct __packed { /** Offset 0x0040**/ FSP_M_CONFIG FspmConfig; } FSPM_UPD; +#define IMAGE_REVISION_MAJOR_VERSION 0x01 +#define IMAGE_REVISION_MINOR_VERSION 0x00 +#define IMAGE_REVISION_REVISION 0x02 +#define IMAGE_REVISION_BUILD_NUMBER 0x04 + #endif diff --git a/src/vendorcode/amd/fsp/sabrina/FspmUpd.h b/src/vendorcode/amd/fsp/sabrina/FspmUpd.h index f21ca42169..f42ed4365c 100644 --- a/src/vendorcode/amd/fsp/sabrina/FspmUpd.h +++ b/src/vendorcode/amd/fsp/sabrina/FspmUpd.h @@ -107,4 +107,9 @@ typedef struct __packed { /** Offset 0x0040**/ FSP_M_CONFIG FspmConfig; } FSPM_UPD; +#define IMAGE_REVISION_MAJOR_VERSION 0x01 +#define IMAGE_REVISION_MINOR_VERSION 0x00 +#define IMAGE_REVISION_REVISION 0x05 +#define IMAGE_REVISION_BUILD_NUMBER 0x00 + #endif |