diff options
| author | Chris.Wang <chris.wang@amd.corp-partner.google.com> | 2023-03-16 15:06:56 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-29 13:20:10 +0000 |
| commit | 8f2953b279d6cb1b73c791412818e144e253175b (patch) | |
| tree | bf8a3c477486c6fb0790b1933001988ae1756e20 /src/vendorcode | |
| parent | b7da7d5263a710318e79fe8679b8368224f317c2 (diff) | |
vc/amd/fsp/mendocino/FspmUpd: Update UDP structure for MDN-FSP
Update UPD structure to align with MDN-FSP.
BUG=b:271704149
BRANCH=none
TEST=Build/Boot to Chrome OS
Signed-off-by: Chris.Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: Ie4021cebb57e3ec22191486aafd9099eec0fbd99
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73751
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/amd/fsp/mendocino/FspmUpd.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h index f7ac83a7e0..391c64b822 100644 --- a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h +++ b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h @@ -101,7 +101,8 @@ typedef struct __packed { /** Offset 0x04E1**/ uint32_t vrm_maximum_current_limit_mA; /** Offset 0x04E5**/ uint32_t vrm_soc_current_limit_mA; /** Offset 0x04E9**/ uint8_t fch_usb_3_port_force_gen1; - /** Offset 0x04EA**/ uint8_t UnusedUpdSpace2[278]; + /** Offset 0x04E9**/ uint8_t pwr_on_vary_bl_to_blon; + /** Offset 0x04EA**/ uint8_t UnusedUpdSpace2[277]; /** Offset 0x0600**/ uint16_t UpdTerminator; } FSP_M_CONFIG; |