diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2024-11-01 14:15:42 -0700 |
|---|---|---|
| committer | Jérémy Compostella <jeremy.compostella@intel.com> | 2024-11-27 21:28:41 +0000 |
| commit | 83fb3b70f0d16ff5d2f755ab875cc4d55992c1fa (patch) | |
| tree | 725b937d889d16b81e810b05e8231cab9c684dca /src/vendorcode | |
| parent | 1e8c6819b16ef5e21b2f3f0137a6027367387298 (diff) | |
drivers/wifi: Support Drive Strength BRI Rsp Table
Drive Strength BRI Rsp Object provides information from the OEM
platforms if they have replaced the Bluetooth Radio Interface resistor
to overcome the potential STEP errors on their designs. Based on
configuration, CNV firmware shall adjust the BRI Rsp line drive
strength.
The bri_resistor_value is encoded as follow:
| Bit | Val | Description | Default |
|------+-----+---------------------------------------------+---------|
| 0 | 0 | Device FW default values | 1 |
| | 1 | Override device FW default values | |
| 3:1 | 0 | Reserved (shall be set to 0) | 0 |
| 7:4 | 0 | DSBR override values (only if bit 0 is set) | 0xf |
| 31:7 | 0 | Reserved (shall be set to 0) | 0 |
Possible values:
- 0xf1 (default): indicates that the resistor on board is 33 Ohm
- 0x0 or 0xb1: indicates that the resistor on board is 10 Ohm
The implementation follows document 559910 Intel Connectivity
Platforms BIOS Guideline revision 9.2 specification.
BUG=b:346600091
TEST=DSBR methods are added to the wifi device and bluetooth companion
device and they return the data supplied by the SAR binary blob
Change-Id: Iebe95815c944d045f4cf686abcd1874a8a45e300
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85017
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/google/chromeos/sar.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/vendorcode/google/chromeos/sar.c b/src/vendorcode/google/chromeos/sar.c index 1a7497518c..eef3bb3df5 100644 --- a/src/vendorcode/google/chromeos/sar.c +++ b/src/vendorcode/google/chromeos/sar.c @@ -178,6 +178,14 @@ static size_t wpfc_table_size(const struct wpfc_profile *wpfc) return sizeof(struct wpfc_profile); } +static size_t dsbr_table_size(const struct dsbr_profile *dsbr) +{ + if (dsbr == NULL) + return 0; + + return sizeof(struct dsbr_profile); +} + static bool valid_legacy_length(size_t bin_len) { if (bin_len == LEGACY_SAR_WGDS_BIN_SIZE) @@ -239,6 +247,7 @@ static int fill_wifi_sar_limits(union wifi_sar_limits *sar_limits, const uint8_t expected_sar_bin_size += bdmm_table_size(sar_limits->bdmm); expected_sar_bin_size += ebrd_table_size(sar_limits->ebrd); expected_sar_bin_size += wpfc_table_size(sar_limits->wpfc); + expected_sar_bin_size += dsbr_table_size(sar_limits->dsbr); if (sar_bin_size != expected_sar_bin_size) { printk(BIOS_ERR, "Invalid SAR size, expected: %zu, obtained: %zu\n", |