AGESA boards: Split dispatcher to romstage and ramstage

The way dispatcher table is set up prevents linker from
optimizing unused code away, we currently have raminit in ramstage.

Optimize this manually by configuring AGESA_ENTRY booleans for
romstage and ramstage separately. This will remove references in
FuncParamsInfo and DispatchTable -arrays.

All boards now include multi-core dispatcher, it has minimal footprint:
  AGESA_ENTRY_LATE_RUN_AP_TASK

ACPI S3 support depends on HAVE_ACPI_RESUME being enabled:
  AGESA_ENTRY_INIT_RESUME
  AGESA_ENTRY_INIT_LATE_RESTORE
  AGESA_ENTRY_INIT_S3SAVE

Disabled for all boards as it was not used:
  AGESA_ENTRY_INIT_GENERAL_SERVICES

Change-Id: I7ec36a5819a8e526cbeb87b04dce4227a1689285
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14417
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

22 files changed, 277 insertions, 1255 deletions

diff --git a/src/vendorcode/amd/agesa/common/Makefile.inc b/src/vendorcode/amd/agesa/common/Makefile.inc
index 985354687e..efc42eec13 100644
--- a/src/vendorcode/amd/agesa/common/Makefile.inc
+++ b/src/vendorcode/amd/agesa/common/Makefile.inc
@@ -27,6 +27,9 @@
 #
 #*****************************************************************************
 
+romstage-y += agesa-entry.c
+ramstage-y += agesa-entry.c
+
 libagesa-y += amdlib.c
 
 # Do not optimise performance-critical low-level IO for size with -Os,
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
new file mode 100644
index 0000000000..e882f2e457
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
@@ -0,0 +1,86 @@
+#ifndef AGESA_ENTRY_CFG_H
+#define AGESA_ENTRY_CFG_H
+
+
+#if defined(__PRE_RAM__)
+
+#define AGESA_ENTRY_INIT_RESET		TRUE
+#define AGESA_ENTRY_INIT_EARLY		TRUE
+#define AGESA_ENTRY_INIT_POST		TRUE
+
+/* Not implemented in coreboot romstage. */
+#define AGESA_ENTRY_INIT_RECOVERY	FALSE
+
+#define AGESA_ENTRY_INIT_RESUME		IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#define AGESA_ENTRY_INIT_LATE_RESTORE	IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+
+/* Move to ramstage? */
+#define AGESA_ENTRY_INIT_ENV		TRUE
+
+#else
+
+#define AGESA_ENTRY_INIT_MID		TRUE
+#define AGESA_ENTRY_INIT_LATE		TRUE
+#define AGESA_ENTRY_INIT_S3SAVE 	IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+
+#endif
+
+/* Not required. */
+#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
+
+/* Required for any multi-core. */
+#define AGESA_ENTRY_LATE_RUN_AP_TASK    TRUE
+
+
+/* Defaults below. */
+
+/*  Process user desired AGESA entry points  */
+#ifndef AGESA_ENTRY_INIT_RESET
+  #define AGESA_ENTRY_INIT_RESET                     FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_RECOVERY
+  #define AGESA_ENTRY_INIT_RECOVERY                  FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_EARLY
+  #define AGESA_ENTRY_INIT_EARLY                     FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_POST
+  #define AGESA_ENTRY_INIT_POST                      FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_ENV
+  #define AGESA_ENTRY_INIT_ENV                       FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_MID
+  #define AGESA_ENTRY_INIT_MID                       FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_LATE
+  #define AGESA_ENTRY_INIT_LATE                      FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_S3SAVE
+  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_RESUME
+  #define AGESA_ENTRY_INIT_RESUME                    FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
+  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
+#endif
+
+#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
+  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
+#endif
+
+#ifndef AGESA_ENTRY_LATE_RUN_AP_TASK
+  #define AGESA_ENTRY_LATE_RUN_AP_TASK               TRUE
+#endif
+
+#endif /* AGESA_ENTRY_CFG_H */
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry.c b/src/vendorcode/amd/agesa/common/agesa-entry.c
new file mode 100644
index 0000000000..e722fc1de2
--- /dev/null
+++ b/src/vendorcode/amd/agesa/common/agesa-entry.c
@@ -0,0 +1,177 @@
+#include <Porting.h>
+#include <AMD.h>
+#include <AGESA.h>
+
+#include "CommonReturns.h"
+
+#include <heapManager.h>
+#include <CreateStruct.h>
+
+#include <Options.h>
+
+#include <agesa-entry-cfg.h>
+
+CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
+{
+  #if AGESA_ENTRY_INIT_RESET == TRUE
+    { AMD_INIT_RESET,
+      sizeof (AMD_RESET_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_INIT_RESET_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
+    { AMD_INIT_RECOVERY,
+      sizeof (AMD_RECOVERY_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_INIT_POST_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_EARLY == TRUE
+    { AMD_INIT_EARLY,
+      sizeof (AMD_EARLY_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_INIT_EARLY_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_ENV == TRUE
+    { AMD_INIT_ENV,
+      sizeof (AMD_ENV_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_INIT_ENV_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_LATE == TRUE
+    { AMD_INIT_LATE,
+      sizeof (AMD_LATE_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
+      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
+      AMD_INIT_LATE_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_MID == TRUE
+    { AMD_INIT_MID,
+      sizeof (AMD_MID_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_INIT_MID_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_POST == TRUE
+    { AMD_INIT_POST,
+      sizeof (AMD_POST_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
+      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
+      AMD_INIT_POST_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_RESUME == TRUE
+    { AMD_INIT_RESUME,
+      sizeof (AMD_RESUME_PARAMS),
+      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
+      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
+      AMD_INIT_RESUME_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
+    { AMD_S3LATE_RESTORE,
+      sizeof (AMD_S3LATE_PARAMS),
+      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_S3_LATE_RESTORE_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
+    { AMD_S3_SAVE,
+      sizeof (AMD_S3SAVE_PARAMS),
+      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
+      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
+      AMD_S3_SAVE_HANDLE
+    },
+  #endif
+
+  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
+    { AMD_LATE_RUN_AP_TASK,
+      sizeof (AP_EXE_PARAMS),
+      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
+      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
+      AMD_LATE_RUN_AP_TASK_HANDLE
+    },
+  #endif
+  { 0, 0, NULL }
+};
+
+CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
+
+CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
+{
+  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
+  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
+
+  #if AGESA_ENTRY_INIT_RESET == TRUE
+    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
+  #endif
+
+  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
+    { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
+  #endif
+
+  #if AGESA_ENTRY_INIT_EARLY == TRUE
+    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
+  #endif
+
+  #if AGESA_ENTRY_INIT_POST == TRUE
+    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
+  #endif
+
+  #if AGESA_ENTRY_INIT_ENV == TRUE
+    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
+  #endif
+
+  #if AGESA_ENTRY_INIT_MID == TRUE
+    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
+  #endif
+
+  #if AGESA_ENTRY_INIT_LATE == TRUE
+    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
+  #endif
+
+  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
+    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
+  #endif
+
+  #if AGESA_ENTRY_INIT_RESUME == TRUE
+    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
+  #endif
+
+  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
+    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
+  #endif
+
+  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
+    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
+    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
+    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
+    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
+    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
+    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
+  #endif
+
+  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
+    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
+  #endif
+  { 0, NULL }
+};
diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
index 2ad7792f78..232d407c4a 100644
--- a/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
@@ -60,8 +60,6 @@
     #define USER_DMI_OPTION     &GetDmiInfoMain
     #define USER_DMI_RELEASE_BUFFER &ReleaseDmiBuffer
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
 
     #ifdef OPTION_FAMILY10H
diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
index c084924ad3..a7149f044c 100644
--- a/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
+++ b/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
@@ -79,8 +79,6 @@
       &HtAssistFamilyServiceArray[0]
     };
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef HT_ASSIST_AP_DISABLE_CACHE
     #define HT_ASSIST_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
     #undef HT_ASSIST_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h
index 410d3cb33d..ead4fcec6a 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h
@@ -63,8 +63,6 @@
     // This additional check keeps AP launch routines from being unnecessarily included
     // in single socket systems.
     #if OPTION_MULTISOCKET == TRUE
-      #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-      #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
       #define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
     #else
       #define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h
index f3ef633933..7f3ac0769f 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h
@@ -82,8 +82,6 @@
       #endif
     #endif
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef L3_FEAT_AP_DISABLE_CACHE
     #define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
     #undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
index d52adfbfff..7d6433db31 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
@@ -129,7 +129,7 @@
     #if AGESA_ENTRY_INIT_LATE == TRUE
       #define USER_PSTATE_OPTION_MAIN   CreatePStateAcpiTables
     #else
-      OPTION_ACPI_FEATURE               CreateAcpiTablesStub;
+//      OPTION_ACPI_FEATURE               CreateAcpiTablesStub;
       #define USER_PSTATE_OPTION_MAIN   CreateAcpiTablesStub
     #endif
     #if AGESA_ENTRY_INIT_POST == TRUE
diff --git a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
index dce81a2325..171adb52af 100644
--- a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
@@ -52,30 +52,6 @@
  *
  ****************************************************************************/
 
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.  Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET                    TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY                 TRUE
-// #define AGESA_ENTRY_INIT_EARLY                    TRUE
-// #define AGESA_ENTRY_INIT_POST                     TRUE
-// #define AGESA_ENTRY_INIT_ENV                      TRUE
-// #define AGESA_ENTRY_INIT_MID                      TRUE
-// #define AGESA_ENTRY_INIT_LATE                     TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE                   TRUE
-// #define AGESA_ENTRY_INIT_RESUME                   TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE             TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES         TRUE
-
-/*  Defaults for private/internal build control settings  */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
 
 VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   //ModuleHeaderSignature
@@ -91,61 +67,6 @@ VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   NULL
 };
 
-/*  Process user desired AGESA entry points  */
-#ifndef AGESA_ENTRY_INIT_RESET
-  #define AGESA_ENTRY_INIT_RESET                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
-  #define AGESA_ENTRY_INIT_RECOVERY                  FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
-  #define AGESA_ENTRY_INIT_EARLY                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
-  #define AGESA_ENTRY_INIT_POST                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
-  #define AGESA_ENTRY_INIT_ENV                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
-  #define AGESA_ENTRY_INIT_MID                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
-  #define AGESA_ENTRY_INIT_LATE                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
-  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
-  #define AGESA_ENTRY_INIT_RESUME                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
-  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
-  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
-#endif
-
-/*  Default the late AP entry point to off.  It can be enabled
-    by any family that may need the late AP functionality, or
-    by any feature code that may need it.  The IBVs no longer
-    have control over this entry point.  */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
-  #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK    FALSE
-
-
 
 /* Process solution defined socket / family installations
  *
@@ -2293,6 +2214,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
  * Include the structure definitions for the defaults table structures
  *
  ****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
 #include  "Options.h"
 #include  "OptionCpuFamiliesInstall.h"
 #include  "OptionsHt.h"
@@ -2508,171 +2431,6 @@ BUILD_OPT_CFG UserOptions = {
   0,                                    //reserved...
 };
 
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET,
-      sizeof (AMD_RESET_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_RESET_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY,
-      sizeof (AMD_RECOVERY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY,
-      sizeof (AMD_EARLY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_EARLY_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV,
-      sizeof (AMD_ENV_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_ENV_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE,
-      sizeof (AMD_LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
-      AMD_INIT_LATE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID,
-      sizeof (AMD_MID_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_MID_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST,
-      sizeof (AMD_POST_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME,
-      sizeof (AMD_RESUME_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
-      AMD_INIT_RESUME_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE,
-      sizeof (AMD_S3LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_S3_LATE_RESTORE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE,
-      sizeof (AMD_S3SAVE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
-      AMD_S3_SAVE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK,
-      sizeof (AP_EXE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_LATE_RUN_AP_TASK_HANDLE
-    },
-  #endif
-  { 0, 0, NULL }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
-  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
-  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
-  #endif
-
-  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
-    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
-    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
-    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
-    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
-    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
-    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
-  #endif
-  { 0, NULL }
-};
-
 CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
 {
   IDS_LATE_RUN_AP_TASK
diff --git a/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h
index 31111e3c54..eb4bc91f99 100644
--- a/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/OptionDmiInstall.h
@@ -66,8 +66,6 @@
     // This additional check keeps AP launch routines from being unnecessarily included
     // in single socket systems.
     #if OPTION_MULTISOCKET == TRUE
-      #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-      #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
       #define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
     #else
       #define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h b/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h
index d98300fa40..175482b9e9 100644
--- a/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/OptionHtAssistInstall.h
@@ -97,8 +97,6 @@
       &HtAssistFamilyServiceArray[0]
     };
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef HT_ASSIST_AP_DISABLE_CACHE
     #define HT_ASSIST_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
     #undef HT_ASSIST_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
index 6e54aa902f..8092ad2a47 100644
--- a/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
@@ -51,31 +51,6 @@
  *
  ****************************************************************************/
 
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.  Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET                    TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY                 TRUE
-// #define AGESA_ENTRY_INIT_EARLY                    TRUE
-// #define AGESA_ENTRY_INIT_POST                     TRUE
-// #define AGESA_ENTRY_INIT_ENV                      TRUE
-// #define AGESA_ENTRY_INIT_MID                      TRUE
-// #define AGESA_ENTRY_INIT_LATE                     TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE                   TRUE
-// #define AGESA_ENTRY_INIT_RESUME                   TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE             TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES         TRUE
-
-/*  Defaults for private/internal build control settings  */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
 VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   //ModuleHeaderSignature
   // Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -90,62 +65,6 @@ VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   NULL
 };
 
-/*  Process user desired AGESA entry points  */
-#ifndef AGESA_ENTRY_INIT_RESET
-  #define AGESA_ENTRY_INIT_RESET                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
-  #define AGESA_ENTRY_INIT_RECOVERY                  FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
-  #define AGESA_ENTRY_INIT_EARLY                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
-  #define AGESA_ENTRY_INIT_POST                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
-  #define AGESA_ENTRY_INIT_ENV                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
-  #define AGESA_ENTRY_INIT_MID                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
-  #define AGESA_ENTRY_INIT_LATE                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
-  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
-  #define AGESA_ENTRY_INIT_RESUME                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
-  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
-  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
-#endif
-
-/*  Default the late AP entry point to off.  It can be enabled
-    by any family that may need the late AP functionality, or
-    by any feature code that may need it.  The IBVs no longer
-    have control over this entry point.  */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
-  #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK    FALSE
-
-
-
 /* Process solution defined socket / family installations
  *
  * As part of the release package for each image, define the options below to select the
@@ -2180,6 +2099,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
  * Include the structure definitions for the defaults table structures
  *
  ****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
 #include  "Options.h"
 #include  "OptionCpuFamiliesInstall.h"
 #include  "OptionsHt.h"
@@ -2353,170 +2274,6 @@ BUILD_OPT_CFG UserOptions = {
   0,                                    //reserved...
 };
 
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET,
-      sizeof (AMD_RESET_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_RESET_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY,
-      sizeof (AMD_RECOVERY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY,
-      sizeof (AMD_EARLY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_EARLY_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV,
-      sizeof (AMD_ENV_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_ENV_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE,
-      sizeof (AMD_LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
-      AMD_INIT_LATE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID,
-      sizeof (AMD_MID_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_MID_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST,
-      sizeof (AMD_POST_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME,
-      sizeof (AMD_RESUME_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
-      AMD_INIT_RESUME_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE,
-      sizeof (AMD_S3LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_S3_LATE_RESTORE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE,
-      sizeof (AMD_S3SAVE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
-      AMD_S3_SAVE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK,
-      sizeof (AP_EXE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_LATE_RUN_AP_TASK_HANDLE
-    },
-  #endif
-  { 0, 0, NULL }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
-  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
-  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
-  #endif
-
-  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
-    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
-    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
-    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
-    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
-    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
-    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
-  #endif
-  { 0, NULL }
-};
 
 CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
 {
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h
index a6d48b3734..b09a58ff0b 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionDmiInstall.h
@@ -64,8 +64,6 @@
     // This additional check keeps AP launch routines from being unnecessarily included
     // in single socket systems.
     #if OPTION_MULTISOCKET == TRUE
-      #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-      #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
       #define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
     #else
       #define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h
index 5804f1dacb..4a73c40dbc 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionL3FeaturesInstall.h
@@ -94,8 +94,6 @@
       #endif
     #endif
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef L3_FEAT_AP_DISABLE_CACHE
     #define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
     #undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
index db331c9c93..7d96fefb76 100644
--- a/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/PlatformInstall.h
@@ -49,31 +49,6 @@
  *
  ****************************************************************************/
 
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.  Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET                    TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY                 TRUE
-// #define AGESA_ENTRY_INIT_EARLY                    TRUE
-// #define AGESA_ENTRY_INIT_POST                     TRUE
-// #define AGESA_ENTRY_INIT_ENV                      TRUE
-// #define AGESA_ENTRY_INIT_MID                      TRUE
-// #define AGESA_ENTRY_INIT_LATE                     TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE                   TRUE
-// #define AGESA_ENTRY_INIT_RESUME                   TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE             TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES         TRUE
-
-/*  Defaults for private/internal build control settings  */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
 VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   //ModuleHeaderSignature
   // Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -88,61 +63,6 @@ VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   NULL
 };
 
-/*  Process user desired AGESA entry points  */
-#ifndef AGESA_ENTRY_INIT_RESET
-  #define AGESA_ENTRY_INIT_RESET                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
-  #define AGESA_ENTRY_INIT_RECOVERY                  FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
-  #define AGESA_ENTRY_INIT_EARLY                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
-  #define AGESA_ENTRY_INIT_POST                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
-  #define AGESA_ENTRY_INIT_ENV                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
-  #define AGESA_ENTRY_INIT_MID                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
-  #define AGESA_ENTRY_INIT_LATE                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
-  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
-  #define AGESA_ENTRY_INIT_RESUME                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
-  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
-  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
-#endif
-
-/*  Default the late AP entry point to off.  It can be enabled
-    by any family that may need the late AP functionality, or
-    by any feature code that may need it.  The IBVs no longer
-    have control over this entry point.  */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
-  #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK    FALSE
-
-
 
 /* Process solution defined socket / family installations
  *
@@ -2279,6 +2199,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
  * Include the structure definitions for the defaults table structures
  *
  ****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
 #include  "Options.h"
 #include  "OptionCpuFamiliesInstall.h"
 #include  "OptionsHt.h"
@@ -2528,171 +2450,6 @@ BUILD_OPT_CFG UserOptions = {
   0,                                    //reserved...
 };
 
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET,
-      sizeof (AMD_RESET_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_RESET_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY,
-      sizeof (AMD_RECOVERY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY,
-      sizeof (AMD_EARLY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_EARLY_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV,
-      sizeof (AMD_ENV_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_ENV_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE,
-      sizeof (AMD_LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
-      AMD_INIT_LATE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID,
-      sizeof (AMD_MID_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_MID_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST,
-      sizeof (AMD_POST_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME,
-      sizeof (AMD_RESUME_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
-      AMD_INIT_RESUME_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE,
-      sizeof (AMD_S3LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_S3_LATE_RESTORE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE,
-      sizeof (AMD_S3SAVE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
-      AMD_S3_SAVE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK,
-      sizeof (AP_EXE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_LATE_RUN_AP_TASK_HANDLE
-    },
-  #endif
-  { 0, 0, NULL, NULL, 0 }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
-  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
-  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
-  #endif
-
-  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
-    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
-    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
-    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
-    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
-    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
-    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
-  #endif
-  { 0, NULL }
-};
-
 CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
 {
   IDS_LATE_RUN_AP_TASK
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h
index fb1b54d25a..541cee9dc1 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionDmiInstall.h
@@ -63,8 +63,6 @@
     // This additional check keeps AP launch routines from being unnecessarily included
     // in single socket systems.
     #if OPTION_MULTISOCKET == TRUE
-      #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-      #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
       #define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
     #else
       #define CPU_DMI_AP_GET_TYPE4_TYPE7
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h
index 5d188e2a96..203b9e27a0 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionL3FeaturesInstall.h
@@ -82,8 +82,6 @@
       #endif
     #endif
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef L3_FEAT_AP_DISABLE_CACHE
     #define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
     #undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
index 7fcfd7ddf5..d91cec8f76 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h
@@ -48,31 +48,6 @@
  *
  ****************************************************************************/
 
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.  Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET                    TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY                 TRUE
-// #define AGESA_ENTRY_INIT_EARLY                    TRUE
-// #define AGESA_ENTRY_INIT_POST                     TRUE
-// #define AGESA_ENTRY_INIT_ENV                      TRUE
-// #define AGESA_ENTRY_INIT_MID                      TRUE
-// #define AGESA_ENTRY_INIT_LATE                     TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE                   TRUE
-// #define AGESA_ENTRY_INIT_RESUME                   TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE             TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES         TRUE
-
-/*  Defaults for private/internal build control settings  */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
 VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   //ModuleHeaderSignature
   // Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -87,61 +62,6 @@ VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   NULL
 };
 
-/*  Process user desired AGESA entry points  */
-#ifndef AGESA_ENTRY_INIT_RESET
-  #define AGESA_ENTRY_INIT_RESET                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
-  #define AGESA_ENTRY_INIT_RECOVERY                  FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
-  #define AGESA_ENTRY_INIT_EARLY                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
-  #define AGESA_ENTRY_INIT_POST                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
-  #define AGESA_ENTRY_INIT_ENV                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
-  #define AGESA_ENTRY_INIT_MID                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
-  #define AGESA_ENTRY_INIT_LATE                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
-  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
-  #define AGESA_ENTRY_INIT_RESUME                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
-  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
-  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
-#endif
-
-/*  Default the late AP entry point to off.  It can be enabled
-    by any family that may need the late AP functionality, or
-    by any feature code that may need it.  The IBVs no longer
-    have control over this entry point.  */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
-  #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK    FALSE
-
-
 
 /* Process solution defined socket / family installations
  *
@@ -2648,6 +2568,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
  * Include the structure definitions for the defaults table structures
  *
  ****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
 #include  "Options.h"
 #include  "OptionCpuFamiliesInstall.h"
 #include  "OptionsHt.h"
@@ -2912,171 +2834,6 @@ BUILD_OPT_CFG UserOptions = {
   0,                                    //reserved...
 };
 
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET,
-      sizeof (AMD_RESET_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_RESET_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY,
-      sizeof (AMD_RECOVERY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY,
-      sizeof (AMD_EARLY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_EARLY_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV,
-      sizeof (AMD_ENV_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_ENV_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE,
-      sizeof (AMD_LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
-      AMD_INIT_LATE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID,
-      sizeof (AMD_MID_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_MID_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST,
-      sizeof (AMD_POST_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME,
-      sizeof (AMD_RESUME_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
-      AMD_INIT_RESUME_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE,
-      sizeof (AMD_S3LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_S3_LATE_RESTORE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE,
-      sizeof (AMD_S3SAVE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
-      AMD_S3_SAVE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK,
-      sizeof (AP_EXE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_LATE_RUN_AP_TASK_HANDLE
-    },
-  #endif
-  { 0, 0, NULL, NULL, 0 }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
-  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
-  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
-  #endif
-
-  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
-    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
-    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
-    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
-    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
-    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
-    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
-  #endif
-  { 0, NULL }
-};
-
 CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
 {
   IDS_LATE_RUN_AP_TASK
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h
index ce8ef06b7b..e0b09b3b6a 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionDmiInstall.h
@@ -75,8 +75,6 @@ OPTION_DMI_RELEASE_BUFFER           ReleaseDmiBufferStub;
     // This additional check keeps AP launch routines from being unnecessarily included
     // in single socket systems.
     #if OPTION_MULTISOCKET == TRUE
-      #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-      #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
       #undef CPU_DMI_AP_GET_TYPE4_TYPE7
       #define CPU_DMI_AP_GET_TYPE4_TYPE7 {AP_LATE_TASK_GET_TYPE4_TYPE7, (IMAGE_ENTRY) GetType4Type7Info},
     #endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h
index 8d34603fc9..3323fea953 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionL3FeaturesInstall.h
@@ -57,8 +57,6 @@
 #if (OPTION_HT_ASSIST == TRUE || OPTION_ATM_MODE == TRUE || OPTION_NBR_CACHE == TRUE)
   #if (AGESA_ENTRY_INIT_EARLY == TRUE) || (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_MID == TRUE) || (AGESA_ENTRY_INIT_LATE_RESTORE == TRUE)
 
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef L3_FEAT_AP_DISABLE_CACHE
     #define L3_FEAT_AP_DISABLE_CACHE {AP_LATE_TASK_DISABLE_CACHE, (IMAGE_ENTRY) DisableAllCaches},
     #undef L3_FEAT_AP_ENABLE_CACHE
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h
index aa510aaac9..711b1a3ace 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionPrefetchModeInstall.h
@@ -57,8 +57,6 @@
 
 #if OPTION_PREFETCH_MODE == TRUE
   #if (AGESA_ENTRY_INIT_LATE == TRUE) || (AGESA_ENTRY_INIT_LATE_RESTORE == TRUE)
-    #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-    #define AGESA_ENTRY_LATE_RUN_AP_TASK TRUE
     #undef CPU_PREFETCH_MODE_AP_TASK
     #define CPU_PREFETCH_MODE_AP_TASK {AP_LATE_TASK_CPU_PREFETCH_MODE, (IMAGE_ENTRY) CpuPrefetchModeApTask},
 
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h
index e989537df6..a313bbb3bb 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/PlatformInstall.h
@@ -48,31 +48,6 @@
  *
  ****************************************************************************/
 
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.  Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET                    TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY                 TRUE
-// #define AGESA_ENTRY_INIT_EARLY                    TRUE
-// #define AGESA_ENTRY_INIT_POST                     TRUE
-// #define AGESA_ENTRY_INIT_ENV                      TRUE
-// #define AGESA_ENTRY_INIT_MID                      TRUE
-// #define AGESA_ENTRY_INIT_LATE                     TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE                   TRUE
-// #define AGESA_ENTRY_INIT_RESUME                   TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE             TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES         TRUE
-
-/*  Defaults for private/internal build control settings  */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
 VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   //ModuleHeaderSignature
   // Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -87,62 +62,6 @@ VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   NULL
 };
 
-/*  Process user desired AGESA entry points  */
-#ifndef AGESA_ENTRY_INIT_RESET
-  #define AGESA_ENTRY_INIT_RESET                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
-  #define AGESA_ENTRY_INIT_RECOVERY                  FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
-  #define AGESA_ENTRY_INIT_EARLY                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
-  #define AGESA_ENTRY_INIT_POST                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
-  #define AGESA_ENTRY_INIT_ENV                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
-  #define AGESA_ENTRY_INIT_MID                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
-  #define AGESA_ENTRY_INIT_LATE                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
-  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
-  #define AGESA_ENTRY_INIT_RESUME                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
-  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
-  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
-#endif
-
-/*  Default the late AP entry point to off.  It can be enabled
-    by any family that may need the late AP functionality, or
-    by any feature code that may need it.  The IBVs no longer
-    have control over this entry point.  */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
-  #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK    FALSE
-
-
-
 /* Process solution defined socket / family installations
  *
  * As part of the release package for each image, define the options below to select the
@@ -1727,6 +1646,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
  * Include the structure definitions for the defaults table structures
  *
  ****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
 #include  "Options.h"
 #include  "OptionCpuFamiliesInstall.h"
 #include  "OptionsHt.h"
@@ -2007,174 +1928,6 @@ BUILD_OPT_CFG UserOptions = {
   0,                                    //reserved...
 };
 
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET,
-      sizeof (AMD_RESET_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_RESET_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY,
-      sizeof (AMD_RECOVERY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY,
-      sizeof (AMD_EARLY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_EARLY_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV,
-      sizeof (AMD_ENV_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_ENV_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE,
-      sizeof (AMD_LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
-      AMD_INIT_LATE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID,
-      sizeof (AMD_MID_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_MID_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST,
-      sizeof (AMD_POST_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME,
-      sizeof (AMD_RESUME_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
-      AMD_INIT_RESUME_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE,
-      sizeof (AMD_S3LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_S3_LATE_RESTORE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE,
-      sizeof (AMD_S3SAVE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
-      AMD_S3_SAVE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK,
-      sizeof (AP_EXE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_LATE_RUN_AP_TASK_HANDLE
-    },
-  #endif
-  { 0, 0, NULL, NULL, 0 }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
-  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
-  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RECOVERY == TRUE
-    { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
-    #if OPTION_DATA_EYE == TRUE
-      { AMD_GET_2D_DATA_EYE, (IMAGE_ENTRY)AmdGet2DDataEye },
-    #endif
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
-  #endif
-
-  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
-    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
-    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
-    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
-    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
-    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
-    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
-  #endif
-  { 0, NULL }
-};
-
 CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
 {
   IDS_LATE_RUN_AP_TASK