diff options
author | Bruce Griffith <Bruce.Griffith@se-eng.com> | 2013-06-25 14:14:14 -0600 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-28 01:35:20 +0200 |
commit | e44a89f6fd4f421f28ef766b380dca112bf4aea2 (patch) | |
tree | d884ddf06701d984482198f6ac422329260cf214 /src/vendorcode | |
parent | af881b898a11eb5c56407475441f4795548f84a2 (diff) |
amd/agesa/f15/Lib/amdlib.c: Add missing breaks to switch statement
Static analysis often flags case statements that do not include
a terminating "break;" statement. Eclipse's CODAN is an example
of this. This changelist modifies amdlib.c to terminate
case statements with "break;".
Change-Id: I3d43acaf64e2e2d9717421cb547fec35e582cf8b
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3539
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/vendorcode')
-rw-r--r-- | src/vendorcode/amd/agesa/f15/Lib/amdlib.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c b/src/vendorcode/amd/agesa/f15/Lib/amdlib.c index ca268ee05e..e51a971a79 100644 --- a/src/vendorcode/amd/agesa/f15/Lib/amdlib.c +++ b/src/vendorcode/amd/agesa/f15/Lib/amdlib.c @@ -285,6 +285,7 @@ LibAmdReadCpuReg ( break; default: *Value = -1; + break; } } VOID @@ -313,7 +314,7 @@ LibAmdWriteCpuReg ( __writedr (7, Value); break; default: - ; + break; } } VOID @@ -503,6 +504,7 @@ LibAmdIoRead ( break; default: ASSERT (FALSE); + break; } } @@ -540,6 +542,7 @@ LibAmdIoWrite ( break; default: ASSERT (FALSE); + break; } } @@ -640,6 +643,7 @@ LibAmdMemRead ( break; default: ASSERT (FALSE); + break; } } @@ -678,6 +682,7 @@ LibAmdMemWrite ( break; default: ASSERT (FALSE); + break; } } /*---------------------------------------------------------------------------------------*/ @@ -1293,6 +1298,7 @@ LibAmdGetDataFromPtr ( break; default: IDS_ERROR_TRAP; + break; } } @@ -1333,6 +1339,7 @@ LibAmdAccessWidth ( default: Width = 0; IDS_ERROR_TRAP; + break; } return Width; } |