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authorArthur Heymans <arthur@aheymans.xyz>2017-04-28 20:53:05 +0200
committerMartin Roth <martinroth@google.com>2017-07-21 15:45:05 +0000
commit12a4e98cea1a5f55a3f54dd4e7bcc8215f80ec85 (patch)
tree7563c0aafc7c3699f03bdfe7301dba9b3dda619b /src/vendorcode
parent349e08535a7666cabe52ebc331e3bce5468b786b (diff)
nb/intel/pineview/raminit: Refactor timings selection
This does not use loops to compute timings but uses DIV_ROUND_UP. Another thing affected by this patch are minimum timings. Presumably those only need to be guarded against on DDR3. With this change timings are set up like vendor (with tWTR below previous minimum) TESTED on Intel D510MO Change-Id: Ia374f26e5bbb8b90d90c24ae6c20412ba53bd7b6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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