diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-12-15 14:32:39 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-04-03 12:47:45 +0000 |
| commit | ede452fb9936a55bddffe9c7ca3e557e9b081f26 (patch) | |
| tree | 27b4990876d6e9ddb6218c2c2b2b6e4c913ebad6 /src/vendorcode | |
| parent | fff762ebb2aab4d4d523ee195fad8da2fee3c453 (diff) | |
vendorcode/amd/opensil: Add CPP args to all stages
It does not hurt to do this and makes it possible to link romstage
sources into bootblock.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ic7edfdac43c2d71ee3dcbd9d8f59c9799595e7f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79576
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/Makefile.mk | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk index 70bf44b32d..ca58868da6 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk +++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.mk @@ -2,8 +2,7 @@ subdirs-y += mpio -CPPFLAGS_ramstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF -CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF +CPPFLAGS_common += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_dir)/xUSL/Include -I$(opensil_dir)/xUSL/FCH -I$(opensil_dir)/xUSL/FCH/Common -I$(opensil_dir)/xSIM -I$(opensil_dir)/xPRF romstage-y += opensil_console.c romstage-y += romstage.c |