diff options
author | Patrick Georgi <patrick@georgi-clan.de> | 2014-05-18 23:30:56 +0200 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-05-19 15:20:33 +0200 |
commit | 9f5af6a65a4d9de1e1b6ac9089a4feec29220148 (patch) | |
tree | 4bb0d779c05b3c9876c3073ff6c46ca757e02ead /src/vendorcode | |
parent | e3927436c64bcbdd17c5adaa24f86c584ecf1a68 (diff) |
vendorcode/amd: kill some intermediate variables in build system
They don't exactly add clarity, but increase the risk
they're used at some obscure place.
Change-Id: Ic74f72dae3f9b7eb2343cb5c51bc44c888e1276c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/5787
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/vendorcode')
-rw-r--r-- | src/vendorcode/amd/agesa/f10/Makefile.inc | 4 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f12/Makefile.inc | 5 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f14/Makefile.inc | 4 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f15/Makefile.inc | 4 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Makefile.inc | 4 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Makefile.inc | 4 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/rd890/Makefile.inc | 22 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/Makefile.inc | 19 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb800/Makefile.inc | 20 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb900/Makefile.inc | 20 |
10 files changed, 22 insertions, 84 deletions
diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index 7e5487100d..b684a2904e 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -43,11 +43,9 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/CPU AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem ## AGESA need sse feature ## -AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC -export AGESA_CFLAGS CPPFLAGS_x86_32 += $(AGESA_INC) -CFLAGS_x86_32 += $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index 677c29717e..b7f9d928bc 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -78,11 +78,8 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/NB/LN AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Tech/DDR3 -AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing -export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) -export AGESA_CFLAGS := $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC) -CFLAGS_x86_32 += $(AGESA_CFLAGS) ####################################################################### diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc index 98fd187bc8..0f570d7dd7 100644 --- a/src/vendorcode/amd/agesa/f14/Makefile.inc +++ b/src/vendorcode/amd/agesa/f14/Makefile.inc @@ -62,13 +62,11 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/GNB AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/CPU AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem -AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) -export AGESA_CFLAGS := $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC) -CFLAGS_x86_32 += $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 3582bf79c0..7c1359e59b 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -511,10 +511,8 @@ romstage-y += $(agesa_lib_src) ramstage-y += $(agesa_lib_src) ## AGESA need sse feature ## -AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC -export AGESA_CFLAGS CPPFLAGS_x86_32 += $(AGESA_INC) -CFLAGS_x86_32 += $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 8c24b40696..4b44ceffdc 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -75,13 +75,11 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Include/Library AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson -AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) -export AGESA_CFLAGS := $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC) -CFLAGS_x86_32 += $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index d5204c94f5..164b305be7 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -77,11 +77,9 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Mem/Feat/RDWR2DTRAINING AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson -AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing +CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) -export AGESA_CFLAGS := $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC) -CFLAGS_x86_32 += $(AGESA_CFLAGS) ####################################################################### diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index b64d7ca968..2b56cd367d 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -27,13 +27,10 @@ # #***************************************************************************** -# CIMX Root directory -CIMX_ROOT = $(src)/vendorcode/amd/cimx - -NB_CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) -NB_CIMX_INC += -I$(src)/northbridge/amd/cimx/rd890 -NB_CIMX_INC += -I$(src)/include/cpu/amd/common -NB_CIMX_INC += -I$(CIMX_ROOT)/rd890 +CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_32 += -I$(src)/northbridge/amd/cimx/rd890 +CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/rd890 romstage-y += amdAcpiIvrs.c romstage-y += amdAcpiLib.c @@ -108,14 +105,3 @@ ramstage-y += nbPowerOnReset.c #ramstage-y += nbRecovery.c #ramstage-y += nbRecoveryInitializer.c ramstage-y += nbMaskedMemoryInit32.S - -NB_CIMX_CFLAGS = -export CIMX_ROOT -export NB_CIMX_INC -export NB_CIMX_CFLAGS - -CPPFLAGS_x86_32 += $(NB_CIMX_INC) -CFLAGS_x86_32 += $(NB_CIMX_CFLAGS) - -####################################################################### - diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index 168ec403b8..ebd1cf2e5f 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -27,13 +27,10 @@ # #***************************************************************************** -# CIMX Root directory -CIMX_ROOT = $(src)/vendorcode/amd/cimx - -SB_CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) -SB_CIMX_INC += -I$(src)/southbridge/amd/cimx/sb700 -SB_CIMX_INC += -I$(src)/include/cpu/amd/common -SB_CIMX_INC += -I$(CIMX_ROOT)/sb700 +CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb700 +CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb700 romstage-y += ACPILIB.c romstage-y += AMDLIB.c @@ -67,11 +64,3 @@ ramstage-y += SBPOR.c ramstage-y += SMM.c ramstage-y += USB.c ramstage-y += LEGACY.c - -export CIMX_ROOT -export SB_CIMX_INC -export SB_CIMX_CFLAGS -CPPFLAGS_x86_32 += $(SB_CIMX_INC) - -####################################################################### - diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc index 51bb5e70b8..a035120bb0 100644 --- a/src/vendorcode/amd/cimx/sb800/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc @@ -17,13 +17,10 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # -# CIMX Root directory -CIMX_ROOT = $(src)/vendorcode/amd/cimx - -CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) -CIMX_INC += -I$(src)/southbridge/amd/cimx/sb800 -CIMX_INC += -I$(src)/include/cpu/amd/common -CIMX_INC += -I$(CIMX_ROOT)/sb800 +CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb800 +CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb800 romstage-y += ACPILIB.c romstage-y += AZALIA.c @@ -74,12 +71,3 @@ ramstage-y += SMM.c ramstage-y += USB.c #ramstage-y += LEGACY.c #ramstage-y += SbModInf.c - -CIMX_CFLAGS = -export CIMX_ROOT -export CIMX_INC -export CIMX_CFLAGS -CPPFLAGS_x86_32 += $(CIMX_INC) - -####################################################################### - diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 6b0d6dd814..ff262337f7 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -17,13 +17,10 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # -# CIMX Root directory -CIMX_ROOT = $(src)/vendorcode/amd/cimx - -CIMX_INC = -I$(src)/mainboard/$(MAINBOARDDIR) -CIMX_INC += -I$(src)/southbridge/amd/cimx/sb900 -CIMX_INC += -I$(src)/include/cpu/amd/common -CIMX_INC += -I$(CIMX_ROOT)/sb900 +CPPFLAGS_x86_32 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb900 +CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb900 romstage-y += AcpiLib.c romstage-y += Azalia.c @@ -77,12 +74,3 @@ ramstage-y += Usb.c #ramstage-y += SbModInf.c ramstage-y += Debug.c ramstage-y += Hwm.c - -CIMX_CFLAGS = -export CIMX_ROOT -export CIMX_INC -export CIMX_CFLAGS -CPPFLAGS_x86_32 += $(CIMX_INC) - -####################################################################### - |