diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-13 05:15:25 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-14 05:58:24 +0100 |
| commit | 3bde659445a70443b444cfdd9473db2639641233 (patch) | |
| tree | 9ff4de7935336344b3d120a8b72869188cf71a83 /src/vendorcode | |
| parent | b4d176bb7108853402b01a79fb122604e58fa732 (diff) | |
vendorcode/amd/agesa: Remove UCODE_VS_FLAG() macro unused variable
Remove useless AGESA microcode macro that leads to unused variable
warnings.
Change-Id: Ia21bfc758f81e349bdd0bfd185df75e8b1898336
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8200
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/vendorcode')
8 files changed, 3 insertions, 17 deletions
diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c index df9c27b92a..f878acd0d6 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c @@ -64,7 +64,6 @@ RDATA_GROUP (G3_DXE) *---------------------------------------------------------------------------------------- */ -UCODE_VS_FLAG (06000425) // Encrypted Patch code 06000425 for 6010 and equivalent CONST UINT8 ROMDATA CpuF15OrMicrocodePatch06000425 [IDS_PAD_4K] = @@ -2671,4 +2670,4 @@ CONST UINT8 ROMDATA CpuF15OrMicrocodePatch06000425 [IDS_PAD_4K] = /*---------------------------------------------------------------------------------------- * E X P O R T E D F U N C T I O N S *---------------------------------------------------------------------------------------- - */
\ No newline at end of file + */ diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c index 5e5cf04ba5..918ef27412 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c @@ -64,7 +64,6 @@ RDATA_GROUP (G3_DXE) *---------------------------------------------------------------------------------------- */ -UCODE_VS_FLAG (0600050D_Enc) // Encrypt Patch code 0600050D for 6011 and equivalent @@ -2672,4 +2671,4 @@ CONST UINT8 ROMDATA CpuF15OrMicrocodePatch0600050D_Enc [IDS_PAD_4K] = /*---------------------------------------------------------------------------------------- * E X P O R T E D F U N C T I O N S *---------------------------------------------------------------------------------------- - */
\ No newline at end of file + */ diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c index eee06bbdcb..8c011ad785 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c @@ -63,7 +63,6 @@ RDATA_GROUP (G3_DXE) *---------------------------------------------------------------------------------------- */ -UCODE_VS_FLAG (06000624_Enc) // Encrypt Patch code 06000624 for 6012 and equivalent diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuEarlyInit.h b/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuEarlyInit.h index c83fb07435..9be6ff6a54 100644 --- a/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuEarlyInit.h +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuEarlyInit.h @@ -92,9 +92,6 @@ typedef struct { IN UINT8 MicrocodePatchesFlag[8]; ///< a flag followed by microcode } MICROCODE_PATCHES_FLAG; -#define UCODE_2K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '2', 'K'}}; -#define UCODE_4K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '4', 'K'}}; -#define UCODE_VS_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', 'V', 'S'}}; /* Offsets in UCODE PATCH Header */ /* Note: Header is 64 bytes */ diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c index 311a26c6e2..80e60f6313 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c @@ -63,7 +63,6 @@ RDATA_GROUP (G3_DXE) *---------------------------------------------------------------------------------------- */ -UCODE_VS_FLAG (0600110F_Enc) // Encrypt Patch code 0600110F for 6101 and equivalent @@ -2671,4 +2670,4 @@ CONST UINT8 ROMDATA CpuF15TnMicrocodePatch0600110F_Enc [IDS_PAD_4K] = /*---------------------------------------------------------------------------------------- * E X P O R T E D F U N C T I O N S *---------------------------------------------------------------------------------------- - */
\ No newline at end of file + */ diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h index c441063918..0c39ec67c2 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h @@ -91,9 +91,6 @@ typedef struct { IN UINT8 MicrocodePatchesFlag[8]; ///< a flag followed by microcode } MICROCODE_PATCHES_FLAG; -#define UCODE_2K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '2', 'K'}}; -#define UCODE_4K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '4', 'K'}}; -#define UCODE_VS_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', 'V', 'S'}}; /* Offsets in UCODE PATCH Header */ /* Note: Header is 64 bytes */ diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c index 14fbfb2970..61876b8db5 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c @@ -63,7 +63,6 @@ RDATA_GROUP (G3_DXE) *---------------------------------------------------------------------------------------- */ -UCODE_VS_FLAG (0700010B) // Encrypt Patch code 0700010B for 7001 and equivalent diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h index ddbb571e3b..c7cdf7d272 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h @@ -91,9 +91,6 @@ typedef struct { IN UINT8 MicrocodePatchesFlag[8]; ///< a flag followed by microcode } MICROCODE_PATCHES_FLAG; -#define UCODE_2K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '2', 'K'}}; -#define UCODE_4K_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', '4', 'K'}}; -#define UCODE_VS_FLAG(x) STATIC CONST MICROCODE_PATCHES_FLAG ROMDATA UcodeFlag##x = {{'$', 'U', 'C', 'O', 'D', 'E', 'V', 'S'}}; /* Offsets in UCODE PATCH Header */ /* Note: Header is 64 bytes */ |