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authorRyan Chuang <ryan.chuang@mediatek.corp-partner.google.com>2021-08-10 10:08:49 +0800
committerNick Vaccaro <nvaccaro@google.com>2021-08-12 17:58:45 +0000
commit45727275476a495044e205ae8fb273feda3f8d5d (patch)
treec7911206d5f30872d9bbaf9a5aea2963a6a9f3b4 /src/vendorcode/mediatek/mt8195
parent909f2d04a0c86b6d3464a6cc4e48048e31b2b6ad (diff)
vc/mediatek/mt8195: Optimize DRAM init time by disabling Vcore setting
Remove the unnecessary Vcore setting for the DVFS feature. Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: If3c28e57a559a7ec04319c1a489138817e44ec4a Reviewed-on: https://review.coreboot.org/c/coreboot/+/56907 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/vendorcode/mediatek/mt8195')
-rw-r--r--src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
index f39023bd14..501f9d3785 100644
--- a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
+++ b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c
@@ -229,8 +229,9 @@ void vSetVcoreByFreq(DRAMC_CTX_T *p)
}
#endif
- if (vcore)
- dramc_set_vcore_voltage(vcore);
+ if (CONFIG(MEDIATEK_DRAM_DVFS))
+ if (vcore)
+ dramc_set_vcore_voltage(vcore);
#if defined(DRAM_HQA)
if (vio18)
@@ -1884,7 +1885,7 @@ int Init_DRAM(DRAM_DRAM_TYPE_T dram_type, DRAM_CBT_MODE_EXTERN_T dram_cbt_mode_e
ett_fix_freq = 1; /* only 1600 & 4266 */
#endif
- if (CONFIG(MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT))
+ if (!CONFIG(MEDIATEK_DRAM_DVFS))
ett_fix_freq = 0x1; // 4266, 1600
if (ett_fix_freq != 0xff)