diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2024-07-31 20:44:01 +0100 |
|---|---|---|
| committer | Sean Rhodes <sean@starlabs.systems> | 2024-10-11 08:32:12 +0000 |
| commit | b0128b18b58699ee3923314e6a95d6eadcd11544 (patch) | |
| tree | 5b693b2b434224f9ca7587812536e3f178080e70 /src/vendorcode/intel | |
| parent | fe14d96b80c44f51d2b85e057d051fdb0935f389 (diff) | |
soc/intel/cnvi: Add power related methods
Only the _PRR method is used here, however, _PS0, _PS3 and _DSW must
exist to avoid a BSOD on Windows.
Change-Id: Ib4a1a8a76ce74b991a3e8686e9594c2c2b145a39
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83711
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Diffstat (limited to 'src/vendorcode/intel')
0 files changed, 0 insertions, 0 deletions