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authorFelix Held <felix-coreboot@felixheld.de>2022-09-29 16:13:26 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-09-30 14:49:33 +0000
commit6f9e817bbfd634123b14611ddcb53472bc08783e (patch)
treeac805596c4f4e721d59facb0903db12e6d30eff2 /src/vendorcode/intel
parent25866fe89321ca57aae4dde062db4c88086e187b (diff)
soc/amd/common/block/lpc/espi_util: use [read,write][8,16,32]p
Also include arch/mmio via device/mmio.h and not directly to have the [read,write][8,16,32]p helper functions available. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I51c6f5c73b41546b304f16994d517ed15dbb555f Reviewed-on: https://review.coreboot.org/c/coreboot/+/67980 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/vendorcode/intel')
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