summaryrefslogtreecommitdiff
path: root/src/vendorcode/intel/fsp
diff options
context:
space:
mode:
authorZheng Bao <fishbaozi@gmail.com>2020-12-15 22:16:51 +0800
committerFelix Held <felix-coreboot@felixheld.de>2020-12-18 17:20:41 +0000
commit02a5dddb01a6629aaf64fdc196b996883602a293 (patch)
tree5b04a9dcc083d0d1ded0568b99d6934a3c56d410 /src/vendorcode/intel/fsp
parentfad0a5b01cbde22134bb2c4d31a96a1282031003 (diff)
soc/amd/cezanne: Add SMI support
Change-Id: I83b9a91cbab297d032292997a4d5768b89fe97dd Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48645 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/fsp')
0 files changed, 0 insertions, 0 deletions