diff options
author | Ronak Kanabar <ronak.kanabar@intel.com> | 2021-09-09 17:50:39 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-10 23:00:26 +0000 |
commit | 91df11242dad406d5fe7822e78e0a76a5b8da8b1 (patch) | |
tree | d18adc7e57c63d85fe3d6e2a1bfafd30bd3c725f /src/vendorcode/intel/fsp | |
parent | 9cdc72a3d8ba0bdb8c5240c854da815c630611e7 (diff) |
vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2347_00
The headers added are generated as per FSP v2347_00.
Previous FSP version was v2265_01.
Changes include:
- UserBd UPD description update in FspmUpd.h
BUG=b:199359579
BRANCH=None
TEST=Build and boot brya
Change-Id: I5e4dd58e5fb1a744b035a4de96986053a02610d3
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/vendorcode/intel/fsp')
-rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h index 1f55fda5ac..4ab722cb84 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h @@ -455,9 +455,9 @@ typedef struct { /** Offset 0x01D0 - Board Type MrcBoardType, Options are 0=Mobile/Mobile Halo, 1=Desktop/DT Halo, 2=Desktop 2DPC - DDR5, 5=ULT/ULX/Mobile Halo, 7=UP Server - 0:Mobile/Mobile Halo, 1:Desktop/DT Halo, 2:Desktop 2DPC DDR5, 5:ULT/ULX/Mobile Halo, - 7:UP Server + DDR5, 5=ULT/ULX/Mobile Halo Type3, 6=ULT/ULX/Mobile Halo Type4, 8=UP Server + 0:Mobile/Mobile Halo, 1:Desktop/DT Halo, 2:Desktop 2DPC DDR5, 5:ULT/ULX/Mobile Halo + Type3, 6:ULT/ULX/Mobile Halo Type4, 8:UP Server **/ UINT8 UserBd; |