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authorMartin Roth <gaumless@gmail.com>2014-04-04 13:53:07 -0600
committerMartin Roth <martin.roth@se-eng.com>2014-04-11 17:27:32 +0200
commitdebd7657548ed7cdc67dcabe3f6e69b33093a43a (patch)
tree83ba39fe604e8fd715fce6b74ec61fdfca62766f /src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h
parent18a40e05334b650d8104787416afd8ba87f03987 (diff)
Add the ivybridge i89xx FSP include & srx directories
These are the .h and .c files from Intel that support interaction with the FSP. These have been modified from the FSP distribution only to strip trailing whitespace. Intel® Firmware Support Package for Intel® Xeon® E3-1125C v2, E3-1105C v2, Intel® Pentium® Processor B925C, and Intel® Core™ i3-3115C Processors for Communications Infrastructure with Intel® Communications Chipset 89xx Series Platform Controller Hub (formerly Crystal Forest Refresh: Ivy Bridge Gladden and Cave Creek "Intel® Firmware Support Package (Intel® FSP) provides key programming information for initializing Intel® silicon and can be easily integrated into a boot loader of the developer’s choice. It is easy to adopt, scalable to design, reduces time-to-market, and is economical to build." http://www.intel.com/fsp Change-Id: Ib76e89b2d2f6407cf55a5a664da989c7a7e0eb23 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/5455 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h')
-rw-r--r--src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h60
1 files changed, 60 insertions, 0 deletions
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h b/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h
new file mode 100644
index 0000000000..fdee5f4d9c
--- /dev/null
+++ b/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h
@@ -0,0 +1,60 @@
+/** @file
+
+Copyright (C) 2013, Intel Corporation
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+ list of conditions and the following disclaimer in the documentation and/or
+ other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ THE POSSIBILITY OF SUCH DAMAGE.
+
+**/
+
+#ifndef __VPDHEADER_H__
+#define __VPDHEADER_H__
+
+#pragma pack(1)
+
+typedef struct _UPD_DATA_REGION {
+ UINT64 Signature; /* Offset 0x0000 */
+ UINT64 Reserved; /* Offset 0x0008 */
+ UINT8 HTEnable; /* Offset 0x0010 */
+ UINT8 TurboEnable; /* Offset 0x0011 */
+ UINT8 MemoryDownEnable; /* Offset 0x0012 */
+ UINT8 FastBootEnable; /* Offset 0x0013 */
+ UINT16 PcdRegionTerminator; /* Offset 0x0310 */
+} UPD_DATA_REGION;
+
+
+#define VPD_IMAGE_SIGN 0x565053462d325453 /* 'ST2-FSPV' */
+#define VPD_IMAGE_REV 0x00000001
+
+typedef struct _VPD_DATA_REGION {
+ UINT64 PcdVpdRegionSign; /* Offset 0x0000 */
+ UINT32 PcdImageRevision; /* Offset 0x0008 */
+ UINT32 PcdUpdRegionOffset; /* Offset 0x000C */
+ UINT8 Padding0[16]; /* Offset 0x0010 */
+ UINT32 PcdFspReservedMemoryLength; /* Offset 0x0020 */
+} VPD_DATA_REGION;
+
+#pragma pack()
+
+#endif