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| author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-09-03 07:01:09 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:30:20 +0000 |
| commit | b369dde9b1cc9daffce83dc809101e0fd0a0e346 (patch) | |
| tree | 00dbd7450ef09e260e7facfbb2a8c9ee97a8c9f2 /src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h | |
| parent | 9440c5356762b94c019d2399d6cddbd61fba96c9 (diff) | |
soc/intel/elkhartlake: Update PMC related register definitions
Update ABase, PMC GPIO value sets and PMC register base address.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: Iba43b791cab0665ddebfbed68b7e2d15406ad206
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h')
0 files changed, 0 insertions, 0 deletions