diff options
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2018-04-20 16:34:40 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-04-27 03:25:43 +0000 |
| commit | 6cc813a5e9b557d10af8bb26f2a9d48ab4c9510d (patch) | |
| tree | 3e65283c7705ebc47b7b46394305cf5690e0683c /src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h | |
| parent | 94984a846166c7ac927fcfcb2b34c1bfeabf8fcf (diff) | |
vendorcode/intel: Update GLK FSP Header files w.r.t FSP v2.0.2
Update FSP header files to match FSP Reference Code Release v2.0.2 for
Gemimilake
CQ-DEPEND=CL:*594651,CL:*598345
Change-Id: I78d064db41a54d97e98d6e44e0832724127e5bfc
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-on: https://review.coreboot.org/25757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h index 4559e225d2..1898c09976 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h @@ -993,7 +993,12 @@ typedef struct { **/ UINT32 RootPort5Perst; -/** Offset 0x017C +/** Offset 0x017C - CpuPeiApWakeupBufferAddr + Address for CpuPeiApWakeupBuffer. +**/ + UINT32 CpuPeiApWakeupBufferAddr; + +/** Offset 0x0180 **/ UINT8 ReservedFspmUpd[4]; } FSP_M_CONFIG; @@ -1014,9 +1019,9 @@ typedef struct { **/ FSP_M_CONFIG FspmConfig; -/** Offset 0x0180 +/** Offset 0x0184 **/ - UINT8 UnusedUpdSpace1[134]; + UINT8 UnusedUpdSpace1[130]; /** Offset 0x0206 **/ |