diff options
author | Jonathan Zhang <jonzhang@fb.com> | 2020-08-21 13:32:20 -0700 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-28 17:44:46 +0000 |
commit | d5f24dd99bb245a6de2d8ca86bfabda05bdb82d1 (patch) | |
tree | 7e6fa9b7af762ee6915795fa257bb7ea61687908 /src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h | |
parent | 0f51ff72e444b58ee89f39234b6b3609a445fe15 (diff) |
vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt soc
Intel CPX-SP FSP ww34 release added some features:
a. change DDR frequency limit.
b. define MRC debug message verbosity level.
c. enable/disablee of PCH DCI.
In addition, there are some changes to HOB data structures.
Update UPD and HOB header files and adapt soc accordingly.
TESTED=booted on YV3 DVT to target OS command line. Also rebooted okay.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Iadbf5dc850c445f988bc7f07a24165abed2298c8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44685
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h')
-rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h index 71ff6d5e8b..f85c4ff0ac 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h @@ -102,11 +102,11 @@ typedef struct SystemMemoryMapHob { UINT8 numberEntries; // Number of Memory Map Elements SYSTEM_MEMORY_MAP_ELEMENT Element[(MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES) + MAX_FPGA_REMOTE_SAD_RULES]; - UINT8 reserved3[24518]; + UINT8 reserved3[24551]; UINT16 BiosFisVersion; // Firmware Interface Specification version currently supported by BIOS - UINT8 reserved4[8]; + UINT8 reserved4[24]; UINT32 MmiohBase; // MMIOH base in 64MB granularity |