diff options
| author | Peter Lemenkov <lemenkov@gmail.com> | 2018-12-07 11:23:21 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-17 14:52:33 +0000 |
| commit | 7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f (patch) | |
| tree | 4be81861c4f9187ef5b4ce0cc1cfd7daeea12dcd /src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h | |
| parent | d5292bf9a5a1e47a3cbb6393f23c6f021232be02 (diff) | |
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;
Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h index d03a844037..3ead9b194a 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspsUpd.h @@ -500,8 +500,8 @@ typedef struct { **/ UINT8 PchCnviMfUart1Type; -/** Offset 0x014C - Espi Lgmr Memory Range decode - This option enables or disables espi lgmr +/** Offset 0x014C - Espi Lgmr Memory Range decode + This option enables or disables espi lgmr $EN_DIS **/ UINT8 PchEspiLgmrEnable; @@ -836,7 +836,7 @@ typedef struct { /** Offset 0x025F - PCIE RP Disable Gen2PLL Shutdown and L1 Clock Gating Enable PCIE RP Disable Gen2PLL Shutdown and L1 Clock Gating Enable Workaround needed for - Alpine ridge + Alpine ridge **/ UINT8 PcieRootPortGen2PllL1CgDisable[24]; @@ -1611,7 +1611,7 @@ typedef struct { Select 'Auto', it will be auto-configured according to probe type. Select 'Enabled' will disable SLP_S0# assertion whereas 'Disabled' will enable SLP_S0# assertion when debug is enabled. \n - Note: This BIOS option should keep 'Auto', other options are intended for advanced + Note: This BIOS option should keep 'Auto', other options are intended for advanced configuration only. 0:Disabled, 1:Enabled, 2:Auto **/ @@ -1622,7 +1622,7 @@ typedef struct { keep PMC default settings. Or select the desired debug probe type for S0ix Override settings.\n Reminder: DCI OOB (aka BSSB) uses CCA probe.\n - Note: This BIOS option should keep 'Auto', other options are intended for advanced + Note: This BIOS option should keep 'Auto', other options are intended for advanced configuration only. 0:No Change, 1:DCI OOB, 2:USB2 DbC, 3:Auto **/ @@ -2218,7 +2218,7 @@ typedef struct { /** Offset 0x0785 - SendEcCmd SendEcCmd function pointer. \n - @code typedef EFI_STATUS (EFIAPI *PLATFORM_SEND_EC_COMMAND) (IN EC_COMMAND_TYPE + @code typedef EFI_STATUS (EFIAPI *PLATFORM_SEND_EC_COMMAND) (IN EC_COMMAND_TYPE EcCmdType, IN UINT8 EcCmd, IN UINT8 SendData, IN OUT UINT8 *ReceiveData); @endcode **/ UINT64 SendEcCmd; @@ -2310,7 +2310,7 @@ typedef struct { **/ UINT32 Signature; -/** Offset 0x07B1 - Enable/Disable Device 7 +/** Offset 0x07B1 - Enable/Disable Device 7 Enable: Device 7 enabled, Disable (Default): Device 7 disabled $EN_DIS **/ |