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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-06 14:09:31 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-14 19:42:59 +0000 |
| commit | 3ef017c4d4975aa055f8be3dc8a5cf37250f88e2 (patch) | |
| tree | fad2ce191d02d41f1517f7d90212c9933d9c9ac7 /src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat | |
| parent | 3d3152eec7efe9bf02499c42b92b4ad22bd7fd4e (diff) | |
[RFC]util/checklist: Remove this functionality
It was only hooked up for galileo board when using the obsolete
FSP1.1. I don't see how it can be useful...
Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30691
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat deleted file mode 100644 index fe1f0d9d2e..0000000000 --- a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat +++ /dev/null @@ -1,20 +0,0 @@ -arch_segment_loaded -backup_top_of_ram -boot_device_init -car_mainboard_post_console_init -car_mainboard_pre_console_init -car_soc_post_console_init -car_soc_pre_console_init -mainboard_check_ec_image -mainboard_post -platform_prog_run -platform_segment_loaded -stage_cache_add -stage_cache_load_stage -timestamp_get -tsc_freq_mhz -vb2ex_hwcrypto_digest_extend -vb2ex_hwcrypto_digest_finalize -vb2ex_hwcrypto_digest_init -vboot_platform_prepare_reboot -verstage_mainboard_init |