diff options
author | Jonathan Zhang <jonzhang@fb.com> | 2020-06-09 17:56:53 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-25 11:57:06 +0000 |
commit | 6d27778973edf6bdebfa812eac8893d52961a891 (patch) | |
tree | 8023f5c4d98247b5ef3ceb18b8820e1131753f7e /src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h | |
parent | c9222f956763d20397152a44985bdb4abdb19e2d (diff) |
vendorcode/intel: Add edk2-stable202005 support
This patch includes (edk2/edk2-stable202005) all required headers
for edk2-stable202005 quarterly EDK2 tag from EDK2 github project
using below command:
>> git clone https://github.com/tianocore/edk2.git vedk2-stable202005
Only include necessary header files.
MdePkg/Include/Base.h was updated to avoid compilation errors through
safeguarding definitions for MIN, MAX, NULL, ABS, ARRAY_SIZE.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3172505d9b829647ee1208c87623172f10b39310
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42239
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h')
-rw-r--r-- | src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h b/src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h new file mode 100644 index 0000000000..ed3a1c1968 --- /dev/null +++ b/src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h @@ -0,0 +1,52 @@ +/** @file + This file defines the Silicon Temp Ram Exit PPI which implements the + required programming steps for disabling temporary memory. + +Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _FSP_TEMP_RAM_EXIT_PPI_H_ +#define _FSP_TEMP_RAM_EXIT_PPI_H_ + +/// +/// Global ID for the FSP_TEMP_RAM_EXIT_PPI. +/// +#define FSP_TEMP_RAM_EXIT_GUID \ + { \ + 0xbc1cfbdb, 0x7e50, 0x42be, { 0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52 } \ + } + +// +// Forward declaration for the FSP_TEMP_RAM_EXIT_PPI. +// +typedef struct _FSP_TEMP_RAM_EXIT_PPI FSP_TEMP_RAM_EXIT_PPI; + +/** + Silicon function for disabling temporary memory. + @param[in] TempRamExitParamPtr - Pointer to the TempRamExit parameters structure. + This structure is normally defined in the Integration + Guide. If it is not defined in the Integration Guide, + pass NULL. + @retval EFI_SUCCESS - FSP execution environment was initialized successfully. + @retval EFI_INVALID_PARAMETER - Input parameters are invalid. + @retval EFI_UNSUPPORTED - The FSP calling conditions were not met. + @retval EFI_DEVICE_ERROR - Temporary memory exit. +**/ +typedef +EFI_STATUS +(EFIAPI *FSP_TEMP_RAM_EXIT) ( + IN VOID *TempRamExitParamPtr + ); + +/// +/// This PPI provides function to disable temporary memory. +/// +struct _FSP_TEMP_RAM_EXIT_PPI { + FSP_TEMP_RAM_EXIT TempRamExit; +}; + +extern EFI_GUID gFspTempRamExitPpiGuid; + +#endif // _FSP_TEMP_RAM_EXIT_PPI_H_ |