diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2018-12-07 11:23:21 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-17 14:52:33 +0000 |
commit | 7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f (patch) | |
tree | 4be81861c4f9187ef5b4ce0cc1cfd7daeea12dcd /src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h | |
parent | d5292bf9a5a1e47a3cbb6393f23c6f021232be02 (diff) |
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;
Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h')
-rw-r--r-- | src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h index eb9f13f13e..087ec4d60e 100644 --- a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h +++ b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Pi/PiSmmCis.h @@ -69,24 +69,24 @@ typedef EFI_MM_INTERRUPT_UNREGISTER EFI_SMM_INTERRUPT_UNREGISTER; typedef struct _EFI_SMM_ENTRY_CONTEXT { EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp; /// - /// A number between zero and the NumberOfCpus field. This field designates which + /// A number between zero and the NumberOfCpus field. This field designates which /// processor is executing the SMM Foundation. /// UINTN CurrentlyExecutingCpu; /// - /// The number of possible processors in the platform. This is a 1 based + /// The number of possible processors in the platform. This is a 1 based /// counter. This does not indicate the number of processors that entered SMM. /// UINTN NumberOfCpus; /// - /// Points to an array, where each element describes the number of bytes in the - /// corresponding save state specified by CpuSaveState. There are always - /// NumberOfCpus entries in the array. + /// Points to an array, where each element describes the number of bytes in the + /// corresponding save state specified by CpuSaveState. There are always + /// NumberOfCpus entries in the array. /// UINTN *CpuSaveStateSize; /// - /// Points to an array, where each element is a pointer to a CPU save state. The - /// corresponding element in CpuSaveStateSize specifies the number of bytes in the + /// Points to an array, where each element is a pointer to a CPU save state. The + /// corresponding element in CpuSaveStateSize specifies the number of bytes in the /// save state area. There are always NumberOfCpus entries in the array. /// VOID **CpuSaveState; @@ -106,8 +106,8 @@ VOID /// /// System Management System Table (SMST) /// -/// The System Management System Table (SMST) is a table that contains a collection of common -/// services for managing SMRAM allocation and providing basic I/O services. These services are +/// The System Management System Table (SMST) is a table that contains a collection of common +/// services for managing SMRAM allocation and providing basic I/O services. These services are /// intended for both preboot and runtime usage. /// struct _EFI_SMM_SYSTEM_TABLE2 { @@ -150,7 +150,7 @@ struct _EFI_SMM_SYSTEM_TABLE2 { /// /// - /// A number between zero and and the NumberOfCpus field. This field designates + /// A number between zero and and the NumberOfCpus field. This field designates /// which processor is executing the SMM infrastructure. /// UINTN CurrentlyExecutingCpu; @@ -159,14 +159,14 @@ struct _EFI_SMM_SYSTEM_TABLE2 { /// UINTN NumberOfCpus; /// - /// Points to an array, where each element describes the number of bytes in the - /// corresponding save state specified by CpuSaveState. There are always - /// NumberOfCpus entries in the array. + /// Points to an array, where each element describes the number of bytes in the + /// corresponding save state specified by CpuSaveState. There are always + /// NumberOfCpus entries in the array. /// UINTN *CpuSaveStateSize; /// - /// Points to an array, where each element is a pointer to a CPU save state. The - /// corresponding element in CpuSaveStateSize specifies the number of bytes in the + /// Points to an array, where each element is a pointer to a CPU save state. The + /// corresponding element in CpuSaveStateSize specifies the number of bytes in the /// save state area. There are always NumberOfCpus entries in the array. /// VOID **CpuSaveState; @@ -180,8 +180,8 @@ struct _EFI_SMM_SYSTEM_TABLE2 { /// UINTN NumberOfTableEntries; /// - /// A pointer to the UEFI Configuration Tables. The number of entries in the table is - /// NumberOfTableEntries. + /// A pointer to the UEFI Configuration Tables. The number of entries in the table is + /// NumberOfTableEntries. /// EFI_CONFIGURATION_TABLE *SmmConfigurationTable; |