diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2018-12-07 11:23:21 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-17 14:52:33 +0000 |
commit | 7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f (patch) | |
tree | 4be81861c4f9187ef5b4ce0cc1cfd7daeea12dcd /src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h | |
parent | d5292bf9a5a1e47a3cbb6393f23c6f021232be02 (diff) |
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;
Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h')
-rw-r--r-- | src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h index f1aa0d4bf3..0232b61b05 100644 --- a/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h +++ b/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/PeiServicesTablePointerLib.h @@ -18,10 +18,10 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. /** Retrieves the cached value of the PEI Services Table pointer. - Returns the cached value of the PEI Services Table pointer in a CPU specific manner - as specified in the CPU binding section of the Platform Initialization Pre-EFI + Returns the cached value of the PEI Services Table pointer in a CPU specific manner + as specified in the CPU binding section of the Platform Initialization Pre-EFI Initialization Core Interface Specification. - + If the cached PEI Services Table pointer is NULL, then ASSERT(). @return The pointer to PeiServices. @@ -34,14 +34,14 @@ GetPeiServicesTablePointer ( ); /** - Caches a pointer PEI Services Table. - - Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer - in a CPU specific manner as specified in the CPU binding section of the Platform Initialization - Pre-EFI Initialization Core Interface Specification. - + Caches a pointer PEI Services Table. + + Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer + in a CPU specific manner as specified in the CPU binding section of the Platform Initialization + Pre-EFI Initialization Core Interface Specification. + If PeiServicesTablePointer is NULL, then ASSERT(). - + @param PeiServicesTablePointer The address of PeiServices pointer. **/ VOID @@ -51,16 +51,16 @@ SetPeiServicesTablePointer ( ); /** - Perform CPU specific actions required to migrate the PEI Services Table + Perform CPU specific actions required to migrate the PEI Services Table pointer from temporary RAM to permanent RAM. - For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes + For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes immediately preceding the Interrupt Descriptor Table (IDT) in memory. - For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes + For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes immediately preceding the Interrupt Descriptor Table (IDT) in memory. For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in - a dedicated CPU register. This means that there is no memory storage - associated with storing the PEI Services Table pointer, so no additional + a dedicated CPU register. This means that there is no memory storage + associated with storing the PEI Services Table pointer, so no additional migration actions are required for Itanium or ARM CPUs. **/ |