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authorStefan Reinauer <reinauer@chromium.org>2012-09-19 11:10:15 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-11-12 19:13:34 +0100
commitc7fe280a29c4408aa557a7101616decb1142980e (patch)
treebb19fb68ce5be846a604847cce612c73bd6b0c88 /src/vendorcode/google
parent6866c08129b20504cd66f88afb232073249c8725 (diff)
vboot: Add option to skip TPM resume on S3 resume
Change-Id: Ie4a98cc8af0dbcf09c7ace79668949ace5938c12 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1752 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/vendorcode/google')
-rw-r--r--src/vendorcode/google/chromeos/Kconfig9
-rw-r--r--src/vendorcode/google/chromeos/vboot.c6
2 files changed, 15 insertions, 0 deletions
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index 24f4c119cf..6242147fd0 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -65,3 +65,12 @@ config FLASHMAP_OFFSET
Offset of flash map in firmware image
endmenu
+
+config NO_TPM_RESUME
+ bool
+ default n
+ depends on CHROMEOS
+ help
+ On some boards the TPM stays powered up in S3. On those
+ boards, booting Windows will break if the TPM resume command
+ is sent during an S3 resume.
diff --git a/src/vendorcode/google/chromeos/vboot.c b/src/vendorcode/google/chromeos/vboot.c
index 5bdb7a2b7a..0f30547056 100644
--- a/src/vendorcode/google/chromeos/vboot.c
+++ b/src/vendorcode/google/chromeos/vboot.c
@@ -39,6 +39,11 @@
#define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1))
#define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2))
+#if CONFIG_NO_TPM_RESUME
+static void init_vboot(int bootmode)
+{
+}
+#else
static const struct {
u8 buffer[12];
} tpm_resume_cmd = {
@@ -229,6 +234,7 @@ static void init_vboot(int bootmode)
printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result);
hard_reset();
}
+#endif
void init_chromeos(int bootmode)
{