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authorAaron Durbin <adurbin@chromium.org>2016-12-12 13:57:11 -0600
committerAaron Durbin <adurbin@chromium.org>2016-12-13 19:52:29 +0100
commit73deeae2d81ddb7a6ac83a6d2e27db35c2aae177 (patch)
treeea3524206a34c8b6b5aeb53ced3c5b67e8980ac9 /src/vendorcode/google
parentc53cf64e46281657794277d8560ee3fd302e9cab (diff)
vendorcode/google/chromeos: provide acpi phase enforcement pin macros
In the factory it's helpful for knowing when a system being built is meant for release with all the security features locked down. Provide support for exporting this type of pin in the acpi tables. BUG=chrome-os-partner:59951 BRANCH=reef Change-Id: Iec70249f19fc36e5c9c3a05b1395f84a3bcda9d0 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17802 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/vendorcode/google')
-rw-r--r--src/vendorcode/google/chromeos/chromeos.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index fd845bfae1..722d62eed5 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -76,6 +76,7 @@ enum {
CROS_GPIO_REC = 1, /* Recovery */
CROS_GPIO_DEV = 2, /* Developer */
CROS_GPIO_WP = 3, /* Write Protect */
+ CROS_GPIO_PE = 4, /* Phase enforcement for final product */
CROS_GPIO_ACTIVE_LOW = 0,
CROS_GPIO_ACTIVE_HIGH = 1,
@@ -125,4 +126,13 @@ struct cros_gpio {
#define CROS_GPIO_WP_AH(num, dev) \
CROS_GPIO_WP_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
+#define CROS_GPIO_PE_INITIALIZER(pol, num, dev) \
+ CROS_GPIO_INITIALIZER(CROS_GPIO_PE, pol, num, dev)
+
+#define CROS_GPIO_PE_AL(num, dev) \
+ CROS_GPIO_PE_INITIALIZER(CROS_GPIO_ACTIVE_LOW, num, dev)
+
+#define CROS_GPIO_PE_AH(num, dev) \
+ CROS_GPIO_PE_INITIALIZER(CROS_GPIO_ACTIVE_HIGH, num, dev)
+
#endif /* __CHROMEOS_H__ */