diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-05-01 16:48:54 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-05-11 22:39:22 +0200 |
commit | 17200ad5fb6a6eb065ca108d308cd1a94268966e (patch) | |
tree | cb5cc6e9540dfc2057dc818f1e97a7be82def302 /src/vendorcode/google/chromeos/vboot2/Makefile.inc | |
parent | 01562b6cb567dca5440b65250da2580db52b31e8 (diff) |
vboot: inject vboot loader for stage loading
As previously done the vboot loader can be optionally
inserted in the stage loading logic in order to
decide the source of each stage. This current patch
allows for verstage to be loaded and interrogated
for the source of all subsequent stages. Additionally,
it's also possible to build this logic directly into
one of the additional stages.
Note that this patch does not allow x86 to work.
Change-Id: Iece018f01b220720c2803dc73c60b2c080d637d0
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10154
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/vendorcode/google/chromeos/vboot2/Makefile.inc')
-rw-r--r-- | src/vendorcode/google/chromeos/vboot2/Makefile.inc | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc index fe1d237931..7a2ea24643 100644 --- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc +++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc @@ -20,13 +20,16 @@ libverstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__ verstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__ +bootblock-y += vboot_loader.c +romstage-y += vboot_loader.c +ramstage-y += vboot_loader.c +verstage-y += vboot_loader.c + bootblock-y += ../vboot_common.c verstage-y += ../vboot_common.c romstage-y += ../vboot_common.c ramstage-y += ../vboot_common.c -bootblock-y += verstub.c -libverstage-y += verstub.c bootblock-y += common.c libverstage-y += verstage.c verstage-y += common.c @@ -37,6 +40,8 @@ libverstage-y += antirollback.c endif romstage-y += vboot_handoff.c common.c +ramstage-y += common.c + verstage-y += verstage.ld ifeq ($(CONFIG_SEPARATE_VERSTAGE),y) |