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authorFrans Hendriks <fhendriks@eltan.com>2022-08-03 09:57:32 +0200
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-10 19:21:06 +0000
commitf4040e63c80bc8bd3f89aaaa1b612d86dd82a8bd (patch)
tree3d39034ed3d66f0ba8d23497be27ab276ef595e7 /src/vendorcode/eltan
parentf67a1aa76af637b8fb9583dcdffe0a2ef4e31940 (diff)
soc/intel/tigerlake: Add USBOTG and CrashLog to irq table
FSP reports missing IRQ for devices. Add USBOTG (D20:F1) and CrashLog & Telemetry (D10:F0) to irq_constrain. Bug = N/A TEST = Build and boot Siemens AS-TGL1 Change-Id: Ic02d33045a07a6888ba97d8f2c6fa71bc7e363e8 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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