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authorAngel Pons <th3fanbus@gmail.com>2020-06-18 15:20:37 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-06-21 09:24:42 +0000
commit08e8cab57841cd1e2cc47bb9899b16a531e1a1f5 (patch)
tree0b3da67c24d9db58890b6cf644ea435901aa8073 /src/vendorcode/cavium/bdk/libdram
parentfe1d80cb08213a302a80714114ea3b9e632411ff (diff)
src: Substitute `__FUNCTION__` with `__func__`
The former is not standard C, and we primarily use the latter form. Change-Id: Ia7091b494ff72588fb6910710fd72165693c1ac5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42516 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Christian Walter <christian.walter@9elements.com>
Diffstat (limited to 'src/vendorcode/cavium/bdk/libdram')
-rw-r--r--src/vendorcode/cavium/bdk/libdram/dram-internal.h2
-rw-r--r--src/vendorcode/cavium/bdk/libdram/dram-tune-ddr3.c22
-rw-r--r--src/vendorcode/cavium/bdk/libdram/libdram.c24
3 files changed, 24 insertions, 24 deletions
diff --git a/src/vendorcode/cavium/bdk/libdram/dram-internal.h b/src/vendorcode/cavium/bdk/libdram/dram-internal.h
index 02bf0d01f1..a54d2a4f4a 100644
--- a/src/vendorcode/cavium/bdk/libdram/dram-internal.h
+++ b/src/vendorcode/cavium/bdk/libdram/dram-internal.h
@@ -158,7 +158,7 @@ static inline int get_ddr_type(bdk_node_t node, const dimm_config_t *dimm_config
#define DEVICE_TYPE DDR4_SPD_KEY_BYTE_DEVICE_TYPE // same for DDR3 and DDR4
spd_ddr_type = read_spd(node, dimm_config, DEVICE_TYPE);
- debug_print("%s:%d spd_ddr_type=0x%02x\n", __FUNCTION__, __LINE__, spd_ddr_type);
+ debug_print("%s:%d spd_ddr_type=0x%02x\n", __func__, __LINE__, spd_ddr_type);
/* we return only DDR4 or DDR3 */
return (spd_ddr_type == 0x0C) ? DDR4_DRAM : DDR3_DRAM;
diff --git a/src/vendorcode/cavium/bdk/libdram/dram-tune-ddr3.c b/src/vendorcode/cavium/bdk/libdram/dram-tune-ddr3.c
index 291fe85567..ebbe836481 100644
--- a/src/vendorcode/cavium/bdk/libdram/dram-tune-ddr3.c
+++ b/src/vendorcode/cavium/bdk/libdram/dram-tune-ddr3.c
@@ -199,7 +199,7 @@ get_speed_bin(bdk_node_t node, int lmc)
}
debug_print("N%d.LMC%d: %s: returning bin %d for MTS %d\n",
- node, lmc, __FUNCTION__, ret, mts_speed);
+ node, lmc, __func__, ret, mts_speed);
return ret;
}
@@ -857,9 +857,9 @@ auto_set_dll_offset(bdk_node_t node, int dll_offset_mode,
// run the test one last time
// print whether there are errors or not, but only when verbose...
bdk_watchdog_poke();
- debug_print("N%d: %s: Start running test one last time\n", node, __FUNCTION__);
+ debug_print("N%d: %s: Start running test one last time\n", node, __func__);
tot_errors = run_dram_tuning_threads(node, num_lmcs, bytemask);
- debug_print("N%d: %s: Finished running test one last time\n", node, __FUNCTION__);
+ debug_print("N%d: %s: Finished running test one last time\n", node, __func__);
if (tot_errors)
ddr_print2("%s Timing Final Test: errors 0x%x\n", mode_str, tot_errors);
@@ -893,7 +893,7 @@ int perform_dll_offset_tuning(bdk_node_t node, int dll_offset_mode, int do_tune)
orig_coremask = bdk_get_running_coremask(node);
/* FIXME(dhendrix): %lx --> %llx */
ddr_print4("N%d: %s: Starting cores (mask was 0x%llx)\n",
- node, __FUNCTION__, orig_coremask);
+ node, __func__, orig_coremask);
/* FIXME(dhendrix): don't call bdk_init_cores(). */
// bdk_init_cores(node, ~0ULL & ~orig_coremask);
dram_tune_max_cores = bdk_get_num_running_cores(node);
@@ -979,7 +979,7 @@ int perform_dll_offset_tuning(bdk_node_t node, int dll_offset_mode, int do_tune)
ddr_interface_64b = !lmc_config.s.mode32b;
// do setup for each active LMC
- debug_print("N%d: %s: starting LMCs setup.\n", node, __FUNCTION__);
+ debug_print("N%d: %s: starting LMCs setup.\n", node, __func__);
for (lmc = 0; lmc < num_lmcs; lmc++) {
#if 0
@@ -1019,7 +1019,7 @@ int perform_dll_offset_tuning(bdk_node_t node, int dll_offset_mode, int do_tune)
#endif
// perform cleanup on all active LMCs
- debug_print("N%d: %s: starting LMCs cleanup.\n", node, __FUNCTION__);
+ debug_print("N%d: %s: starting LMCs cleanup.\n", node, __func__);
for (lmc = 0; lmc < num_lmcs; lmc++) {
/* Restore ECC for DRAM tests */
@@ -1066,12 +1066,12 @@ int perform_dll_offset_tuning(bdk_node_t node, int dll_offset_mode, int do_tune)
uint64_t reset_coremask = 0;
if (reset_coremask) {
/* FIXME(dhendrix): %lx --> %llx */
- ddr_print4("N%d: %s: Stopping cores 0x%llx\n", node, __FUNCTION__,
+ ddr_print4("N%d: %s: Stopping cores 0x%llx\n", node, __func__,
reset_coremask);
bdk_reset_cores(node, reset_coremask);
} else {
/* FIXME(dhendrix): %lx --> %llx */
- ddr_print4("N%d: %s: leaving cores set to 0x%llx\n", node, __FUNCTION__,
+ ddr_print4("N%d: %s: leaving cores set to 0x%llx\n", node, __func__,
orig_coremask);
}
@@ -1215,7 +1215,7 @@ run_best_hw_patterns(bdk_node_t node, int lmc, uint64_t phys_addr,
setup_lfsr_pattern(node, lmc, 0);
errors = test_dram_byte_hw(node, lmc, phys_addr, mode, xor_data);
VB_PRT(VBL_DEV2, "%s: LFSR at A:0x%012llx errors 0x%x\n",
- __FUNCTION__, phys_addr, errors);
+ __func__, phys_addr, errors);
} else {
for (pattern = 0; pattern < NUM_BYTE_PATTERNS; pattern++) {
pattern_p = byte_patterns[pattern];
@@ -1224,7 +1224,7 @@ run_best_hw_patterns(bdk_node_t node, int lmc, uint64_t phys_addr,
errs = test_dram_byte_hw(node, lmc, phys_addr, mode, xor_data);
VB_PRT(VBL_DEV2, "%s: PATTERN %d at A:0x%012llx errors 0x%x\n",
- __FUNCTION__, pattern, phys_addr, errs);
+ __func__, pattern, phys_addr, errs);
errors |= errs;
} /* for (pattern = 0; pattern < NUM_BYTE_PATTERNS; pattern++) */
@@ -1270,7 +1270,7 @@ hw_assist_test_dll_offset(bdk_node_t node, int dll_offset_mode,
hw_rank_offset = 1ull << (28 + lmcx_config.s.pbank_lsb - lmcx_config.s.rank_ena + (num_lmcs/2));
debug_print("N%d: %s: starting LMC%d with rank offset 0x%lx\n",
- node, __FUNCTION__, lmc, hw_rank_offset);
+ node, __func__, lmc, hw_rank_offset);
// start of pattern loop
// we do the set of tests for each pattern supplied...
diff --git a/src/vendorcode/cavium/bdk/libdram/libdram.c b/src/vendorcode/cavium/bdk/libdram/libdram.c
index 740de8498f..e2c6017da8 100644
--- a/src/vendorcode/cavium/bdk/libdram/libdram.c
+++ b/src/vendorcode/cavium/bdk/libdram/libdram.c
@@ -437,21 +437,21 @@ int libdram_tune(int node)
// so, enable any non-running cores on this node, and leave them
// running at the end...
ddr_print("N%d: %s: Starting cores (mask was 0x%llx)\n",
- node, __FUNCTION__, bdk_get_running_coremask(node));
+ node, __func__, bdk_get_running_coremask(node));
bdk_init_cores(node, ~0ULL);
// must test for L2C locked here, cannot go on with it unlocked
// FIXME: but we only need to worry about Node 0???
if (node == 0) {
if (!l2c_is_locked) { // is unlocked, must lock it now
- ddr_print("N%d: %s: L2C was unlocked - locking it now\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: L2C was unlocked - locking it now\n", node, __func__);
// FIXME: this should be common-ized; it currently matches bdk_init()...
bdk_l2c_lock_mem_region(node, 0, bdk_l2c_get_cache_size_bytes(node) * 3 / 4);
} else {
- ddr_print("N%d: %s: L2C was already locked - continuing\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: L2C was already locked - continuing\n", node, __func__);
}
} else {
- ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __func__);
}
// call the tuning routines, no filtering...
@@ -464,10 +464,10 @@ int libdram_tune(int node)
// FIXME: this should be common-ized; it currently matches bdk_init()...
bdk_l2c_unlock_mem_region(node, 0, bdk_l2c_get_cache_size_bytes(node) * 3 / 4);
} else {
- ddr_print("N%d: %s: L2C was already locked - leaving it locked\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: L2C was already locked - leaving it locked\n", node, __func__);
}
} else {
- ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __func__);
}
// make sure to clear memory and any ECC errs when done...
@@ -605,21 +605,21 @@ int libdram_margin(int node)
// so, enable any non-running cores on this node, and leave them
// running at the end...
ddr_print("N%d: %s: Starting cores (mask was 0x%llx)\n",
- node, __FUNCTION__, bdk_get_running_coremask(node));
+ node, __func__, bdk_get_running_coremask(node));
bdk_init_cores(node, ~0ULL);
// must test for L2C locked here, cannot go on with it unlocked
// FIXME: but we only need to worry about Node 0???
if (node == 0) {
if (!l2c_is_locked) { // is unlocked, must lock it now
- ddr_print("N%d: %s: L2C was unlocked - locking it now\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: L2C was unlocked - locking it now\n", node, __func__);
// FIXME: this should be common-ized; it currently matches bdk_init()...
bdk_l2c_lock_mem_region(node, 0, bdk_l2c_get_cache_size_bytes(node) * 3 / 4);
} else {
- ddr_print("N%d: %s: L2C was already locked - continuing\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: L2C was already locked - continuing\n", node, __func__);
}
} else {
- ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __func__);
}
debug_print("N%d: Starting DRAM Margin ALL\n", node);
@@ -659,10 +659,10 @@ int libdram_margin(int node)
// FIXME: this should be common-ized; it currently matches bdk_init()...
bdk_l2c_unlock_mem_region(node, 0, bdk_l2c_get_cache_size_bytes(node) * 3 / 4);
} else {
- ddr_print("N%d: %s: L2C was already locked - leaving it locked\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: L2C was already locked - leaving it locked\n", node, __func__);
}
} else {
- ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __FUNCTION__);
+ ddr_print("N%d: %s: non-zero node, not worrying about L2C lock status\n", node, __func__);
}
return 0;