diff options
| author | Peter Lemenkov <lemenkov@gmail.com> | 2018-12-07 11:23:21 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-17 14:52:33 +0000 |
| commit | 7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f (patch) | |
| tree | 4be81861c4f9187ef5b4ce0cc1cfd7daeea12dcd /src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c | |
| parent | d5292bf9a5a1e47a3cbb6393f23c6f021232be02 (diff) | |
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;
Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c')
| -rw-r--r-- | src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c b/src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c index 4d6ef8d25d..26c4fd45a1 100644 --- a/src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c +++ b/src/vendorcode/cavium/bdk/libbdk-hal/if/bdk-if-phy-vetesse-8514.c @@ -90,7 +90,7 @@ static void vitesse_init_script(bdk_node_t node, int mdio_bus, int phy_addr) uint16_t reg_addr; uint16_t reg_val; uint16_t mask; - + BDK_TRACE(PHY,"In %s\n",__FUNCTION__); BDK_TRACE(PHY,"Loading init script for VSC8514\n"); @@ -122,20 +122,20 @@ static void vitesse_program(bdk_node_t node, int mdio_bus, int phy_addr) /** * Setup Vitesse PHYs - * This function sets up one port in a Vitesse VSC8514 + * This function sets up one port in a Vitesse VSC8514 */ static void setup_vitesse_phy(bdk_node_t node, int mdio_bus, int phy_addr) { /*setting MAC if*/ bdk_mdio_write(node, mdio_bus, phy_addr, 31, VSC_PHY_GPIO_PAGE); - wr_masked(node,mdio_bus,phy_addr, 19, 0x4000, 0xc000); + wr_masked(node,mdio_bus,phy_addr, 19, 0x4000, 0xc000); bdk_mdio_write(node, mdio_bus, phy_addr, 18, 0x80e0); /*Setting media if*/ bdk_mdio_write(node, mdio_bus, phy_addr, 31, VSC_PHY_STD_PAGE); // Reg23, 10:8 Select copper, CAT5 copper only wr_masked(node,mdio_bus,phy_addr, 23, 0x0000, 0x0700); - + // Reg0:15, soft Reset wr_masked(node,mdio_bus,phy_addr, 0, 0x8000, 0x8000); int time_out = 100; @@ -159,9 +159,9 @@ static void setup_vitesse_phy(bdk_node_t node, int mdio_bus, int phy_addr) bdk_mdio_write(node, mdio_bus, phy_addr, 16, 0x80); // Select main registers bdk_mdio_write(node, mdio_bus, phy_addr, 31, VSC_PHY_STD_PAGE); - + /* - + if (LOOP_INTERNAL) { reg0 = bdk_mdio_read(node, mdio_bus, phy_addr, 0); @@ -176,7 +176,7 @@ static void setup_vitesse_phy(bdk_node_t node, int mdio_bus, int phy_addr) reg23 = bdk_insert(reg23, 1, 3, 1); bdk_mdio_write(node, mdio_bus, phy_addr, 23, reg23); } - + // Dump registers if (false) |