diff options
author | David Hendricks <dhendricks@fb.com> | 2018-03-09 14:30:38 -0800 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-07-03 15:53:32 +0000 |
commit | 7d48ac5c7dfb52fc470bbad1013b4d460bc6a1e0 (patch) | |
tree | 42002ba1e86627339ff4a6cf38efb4b3f00033bb /src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c | |
parent | d837e660074e0621d63f59515f933c209441b653 (diff) |
soc/cavium: Integrate BDK files into coreboot
* Make it compile.
* Fix whitespace errors.
* Fix printf formats.
* Add missing headers includes
* Guard headers with ifdefs
Compile DRAM init code in romstage.
Compile QLM, PCIe, RNG, PHY, GPIO, MDIO init code in ramstage.
Change-Id: I0a93219a14bfb6ebe41103a825d5032b11e7f2c6
Signed-off-by: David Hendricks <dhendricks@fb.com>
Reviewed-on: https://review.coreboot.org/25089
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c')
-rw-r--r-- | src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c | 133 |
1 files changed, 4 insertions, 129 deletions
diff --git a/src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c b/src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c index f81285dffd..b8b0952de4 100644 --- a/src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c +++ b/src/vendorcode/cavium/bdk/libbdk-hal/bdk-clock.c @@ -37,123 +37,10 @@ * ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. ***********************license end**************************************/ #include <bdk.h> -#include "libbdk-arch/bdk-csrs-gti.h" -#include "libbdk-arch/bdk-csrs-ocx.h" - -/** - * Called in __bdk_init to setup the global timer - */ -void bdk_clock_setup(bdk_node_t node) -{ - const bdk_node_t local_node = bdk_numa_local(); - - /* Check if the counter was already setup */ - BDK_CSR_INIT(cntcr, node, BDK_GTI_CC_CNTCR); - if (cntcr.s.en) - return; - - /* Configure GTI to tick at BDK_GTI_RATE */ - uint64_t sclk = bdk_clock_get_rate(node, BDK_CLOCK_SCLK); - uint64_t inc = (BDK_GTI_RATE << 32) / sclk; - BDK_CSR_WRITE(node, BDK_GTI_CC_CNTRATE, inc); - BDK_CSR_WRITE(node, BDK_GTI_CTL_CNTFRQ, BDK_GTI_RATE); - cntcr.s.en = 1; - if (node != local_node) - { - /* Synchronize with local node. Very simple set of counter, will be - off a little */ - BDK_CSR_WRITE(node, BDK_GTI_CC_CNTCV, bdk_clock_get_count(BDK_CLOCK_TIME)); - } - /* Enable the counter */ - BDK_CSR_WRITE(node, BDK_GTI_CC_CNTCR, cntcr.u); - BDK_CSR_READ(node, BDK_GTI_CC_CNTCR); - - if (node != local_node) - { - if (CAVIUM_IS_MODEL(CAVIUM_CN88XX_PASS1_X)) - { - /* Assume the delay in each direction is the same, sync the counters */ - int64_t local1 = bdk_clock_get_count(BDK_CLOCK_TIME); - int64_t remote = BDK_CSR_READ(node, BDK_GTI_CC_CNTCV); - int64_t local2 = bdk_clock_get_count(BDK_CLOCK_TIME); - int64_t expected = (local1 + local2) / 2; - BDK_CSR_WRITE(node, BDK_GTI_CC_CNTADD, expected - remote); - BDK_TRACE(INIT, "N%d.GTI: Clock synchronization with master\n" - " expected: %ld, remote %ld\n" - " Counter correction: %ld\n", - node, expected, remote, expected - remote); - } - else - { - /* Due to errata TBD, we need to use OCX_PP_CMD to write - GTI_CC_CNTMB in order for timestamps to update. These constants - are the addresses we need for both local and remote GTI_CC_CNTMB */ - const uint64_t LOCAL_GTI_CC_CNTMB = bdk_numa_get_address(local_node, BDK_GTI_CC_CNTMB); - const uint64_t REMOTE_GTI_CC_CNTMB = bdk_numa_get_address(node, BDK_GTI_CC_CNTMB); - /* Build partial OCX_PP_CMD command used for writes. Address will - be filled later */ - BDK_CSR_DEFINE(pp_cmd, BDK_OCX_PP_CMD); - pp_cmd.u = 0; - pp_cmd.s.wr_mask = 0xff; - - const int NUM_AVERAGE = 16; /* Choose a power of two to avoid division */ - int64_t local_to_remote_sum = 0; - int64_t local_to_remote_min = 1000000; - int64_t local_to_remote_max = -1000000; - int64_t remote_to_local_sum = 0; - int64_t remote_to_local_min = 1000000; - int64_t remote_to_local_max = -1000000; - for (int loop = 0; loop < NUM_AVERAGE; loop++) - { - /* Perform a write to the remote GTI_CC_CNTMB to cause timestamp - update. We don't care about the value actually written */ - pp_cmd.s.addr = REMOTE_GTI_CC_CNTMB; - BDK_CSR_WRITE(local_node, BDK_OCX_PP_CMD, pp_cmd.u); - BDK_CSR_READ(local_node, BDK_OCX_PP_CMD); - - int64_t remote = BDK_CSR_READ(node, BDK_GTI_CC_CNTMBTS); - int64_t local = BDK_CSR_READ(local_node, BDK_GTI_CC_CNTMBTS); - int64_t delta = remote - local; - - local_to_remote_sum += delta; - if (delta < local_to_remote_min) - local_to_remote_min = delta; - if (delta > local_to_remote_max) - local_to_remote_max = delta; - - /* Perform a write to the local GTI_CC_CNTMB to cause timestamp - update. We don't care about the value actually written */ - pp_cmd.s.addr = LOCAL_GTI_CC_CNTMB; - BDK_CSR_WRITE(node, BDK_OCX_PP_CMD, pp_cmd.u); - BDK_CSR_READ(node, BDK_OCX_PP_CMD); - - remote = BDK_CSR_READ(node, BDK_GTI_CC_CNTMBTS); - local = BDK_CSR_READ(local_node, BDK_GTI_CC_CNTMBTS); - delta = local - remote; - - remote_to_local_sum += delta; - if (delta < remote_to_local_min) - remote_to_local_min = delta; - if (delta > remote_to_local_max) - remote_to_local_max = delta; - } - /* Calculate average, rounding to nearest */ - int64_t local_to_remote = (local_to_remote_sum + NUM_AVERAGE/2) / NUM_AVERAGE; - int64_t remote_to_local = (remote_to_local_sum + NUM_AVERAGE/2) / NUM_AVERAGE; - /* Calculate remote node offset */ - int64_t remote_offset = (remote_to_local - local_to_remote) / 2; - BDK_CSR_WRITE(node, BDK_GTI_CC_CNTADD, remote_offset); - BDK_TRACE(INIT, "N%d.GTI: Clock synchronization with master\n" - " local -> remote: min %ld, avg %ld, max %ld\n" - " remote -> local: min %ld, avg %ld, max %ld\n" - " Counter correction: %ld\n", - node, - local_to_remote_min, local_to_remote, local_to_remote_max, - remote_to_local_min, remote_to_local, remote_to_local_max, - remote_offset); - } - } -} +#include <libbdk-arch/bdk-csrs-gti.h> +#include <libbdk-arch/bdk-csrs-ocx.h> +#include <libbdk-hal/bdk-clock.h> +#include <libbdk-arch/bdk-csrs-rst.h> /** * Get cycle count based on the clock type. @@ -165,12 +52,6 @@ uint64_t __bdk_clock_get_count_slow(bdk_clock_t clock) { bdk_node_t node = bdk_numa_local(); BDK_CSR_INIT(rst_boot, node, BDK_RST_BOOT); - if (bdk_is_platform(BDK_PLATFORM_EMULATOR)) - { - /* Force RCLK and SCLK to be 1GHz on emulator */ - rst_boot.s.c_mul = 20; - rst_boot.s.pnr_mul = 20; - } uint64_t ref_cntr = BDK_CSR_READ(node, BDK_RST_REF_CNTR); switch(clock) { @@ -199,12 +80,6 @@ uint64_t __bdk_clock_get_rate_slow(bdk_node_t node, bdk_clock_t clock) const uint64_t REF_CLOCK = 50000000; BDK_CSR_INIT(mio_rst_boot, node, BDK_RST_BOOT); - if (bdk_is_platform(BDK_PLATFORM_EMULATOR)) - { - /* Force RCLK and SCLK to be 1GHz on emulator */ - mio_rst_boot.s.c_mul = 20; - mio_rst_boot.s.pnr_mul = 20; - } switch (clock) { case BDK_CLOCK_TIME: |