diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/vendorcode/amd | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/vendorcode/amd')
5 files changed, 8 insertions, 8 deletions
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h index 33a2139c6b..f787014f96 100644 --- a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h +++ b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h @@ -8,18 +8,18 @@ #define AGESA_ENTRY_INIT_EARLY TRUE #define AGESA_ENTRY_INIT_POST TRUE -#define AGESA_ENTRY_INIT_RESUME IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) +#define AGESA_ENTRY_INIT_RESUME CONFIG(HAVE_ACPI_RESUME) #else #define AGESA_ENTRY_INIT_ENV TRUE -#define AGESA_ENTRY_INIT_LATE_RESTORE IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) +#define AGESA_ENTRY_INIT_LATE_RESTORE CONFIG(HAVE_ACPI_RESUME) #define AGESA_ENTRY_INIT_MID TRUE #define AGESA_ENTRY_INIT_LATE TRUE #define AGESA_ENTRY_INIT_S3SAVE \ - (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) || \ - IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) + (CONFIG(HAVE_ACPI_RESUME) || \ + CONFIG(ENABLE_MRC_CACHE)) #endif diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mp.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mp.c index b4a60a1201..3bf35f1c76 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mp.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/mp.c @@ -489,7 +489,7 @@ MemPIsIdSupported ( return TRUE; } } - if (IS_ENABLED(CONFIG_FORCE_AM1_SOCKET_SUPPORT)) + if (CONFIG(FORCE_AM1_SOCKET_SUPPORT)) return TRUE; else return FALSE; diff --git a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc index 51c6b52248..75ba9e7df5 100644 --- a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc +++ b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc @@ -916,7 +916,7 @@ fam15_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- -#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if !CONFIG(POSTCAR_STAGE) wbinvd #else invd diff --git a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc index b9cc39fac5..8f3ca83598 100644 --- a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc +++ b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc @@ -651,7 +651,7 @@ fam15_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- -#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if !CONFIG(POSTCAR_STAGE) wbinvd #else invd diff --git a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc index 6c4ad596e1..357b8be6d5 100644 --- a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc +++ b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc @@ -615,7 +615,7 @@ fam16_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- -#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if !CONFIG(POSTCAR_STAGE) wbinvd #else invd |