vendorcode/amd/agesa: Drop unused common code

No platform uses this.

Change-Id: If32a4de7ef263f1d4f7ab7a36751ad9dcf52dc7e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69127
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

10 files changed, 0 insertions, 2203 deletions

diff --git a/src/vendorcode/amd/Makefile.inc b/src/vendorcode/amd/Makefile.inc
index 8cce5e6893..9cdbe60a32 100644
--- a/src/vendorcode/amd/Makefile.inc
+++ b/src/vendorcode/amd/Makefile.inc
@@ -1,3 +1,2 @@
 subdirs-y += pi
-subdirs-y += agesa
 subdirs-y += cimx
diff --git a/src/vendorcode/amd/agesa/Kconfig b/src/vendorcode/amd/agesa/Kconfig
deleted file mode 100644
index 4bc6a3d569..0000000000
--- a/src/vendorcode/amd/agesa/Kconfig
+++ /dev/null
@@ -1,182 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-config IDS_OPTIONS_HOOKED_UP
-	bool
-	help
-	  to Kconfig options.
-	  Historically, IDS configuration was defined in a mainboard-specific
-	  `OptionsIds.h` header. Select this on platforms where IDS config is
-	  hooked up to Kconfig options instead.
-
-if IDS_OPTIONS_HOOKED_UP
-
-config IDS_ENABLED
-	bool "Enable AGESA IDS (Integrated Debug Services) support"
-	default y
-	help
-	  This is the master switch for the IDS sub-system. Use this option to
-	  enable or remove the entire IDS feature set. This switch must be TRUE
-	  for any of the other options to function.
-
-comment "Warning: IDS options may not work. Enable at your own risk!"
-	depends on IDS_ENABLED
-
-config IDS_CONTROL_ENABLED
-	bool "Enable IDS User Interface controls"
-	depends on IDS_ENABLED
-	help
-	  This is the main switch for the IDS configuration controls. This
-	  switch must be TRUE for any of the configuration controls to function.
-
-	  This seems to allow AGESA to retrieve settings from CMOS.
-
-config IDS_PERF_ANALYSIS
-	bool "Enable IDS performance analysis"
-	depends on IDS_ENABLED
-	help
-	  This is the main switch for the IDS performance analysis controls,
-	  macros and support code needed to enable time data gathering. This
-	  switch must be TRUE for any of the performance analysis features to
-	  function.
-
-config IDS_TRACING_ENABLED
-	bool "Enable IDS console"
-	depends on IDS_ENABLED
-	help
-	  This is the main switch for the IDS console controls, macros and
-	  support code needed to enable tracing of algorithms. This switch
-	  must be TRUE for any of the tracing features to function.
-
-config IDS_TRACING_CONSOLE_SERIAL
-	bool "Use serial port as IDS console"
-	depends on IDS_TRACING_ENABLED
-	default DRIVERS_UART_8250IO && CONSOLE_SERIAL
-	help
-	  Use an I/O-mapped serial port to output IDS messages.
-
-endif # IDS_OPTIONS_HOOKED_UP
-
-choice
-	prompt "DDR3 memory profile"
-	default CPU_AMD_AGESA_OPENSOURCE_MEM_JEDEC
-	help
-	  Choose the DDR3 memory profile to use for your RAM sticks, e.g. XMP 1.
-	  XMP support is experimental, and your PC will fail booting if you choose
-	  a profile which does not exist on ANY of your RAM sticks! If in doubt
-	  check their SPD Data using a coreboot's great fork of memtest86+ 5.01.
-
-config CPU_AMD_AGESA_OPENSOURCE_MEM_JEDEC
-	bool "JEDEC"
-	help
-	  JEDEC memory profile, standard and stable. Is guaranteed to be working.
-
-config CPU_AMD_AGESA_OPENSOURCE_MEM_XMP_1
-	bool "XMP 1"
-	help
-	  XMP 1 memory profile. Check that it exists on ALL of your RAM sticks!
-
-config CPU_AMD_AGESA_OPENSOURCE_MEM_XMP_2
-	bool "XMP 2"
-	help
-	  XMP 2 memory profile. Check that it exists on ALL of your RAM sticks!
-
-config CPU_AMD_AGESA_OPENSOURCE_MEM_CUSTOM
-	bool "CUSTOM"
-	help
-	  Custom memory profile. Use the XMP SPD values as the base, if available.
-
-endchoice
-
-if CPU_AMD_AGESA_OPENSOURCE_MEM_CUSTOM
-
-config CUSTOM_SPD_DIVIDENT
-	int "[10]: Medium Timebase (MTB) Dividend"
-	default 1
-	range 1 255
-
-config CUSTOM_SPD_DIVISOR
-	int "[11]: Medium Timebase (MTB) Divisor"
-	default 14
-	range 1 255
-
-config CUSTOM_SPD_TCK
-	int "[12]: SDRAM Minimum Cycle Time, tCK"
-	default 15
-	range 1 255
-
-config CUSTOM_SPD_CASLO
-	int "[14]: CAS Latencies Supported, Lower Byte"
-	default 124
-	range 0 255
-
-config CUSTOM_SPD_CASHI
-	int "[15]: CAS Latencies Supported, Higher Byte"
-	default 0
-	range 0 255
-
-config CUSTOM_SPD_TAA
-	int "[16]: Min CAS Latency Time, tAA"
-	default 132
-	range 1 255
-
-config CUSTOM_SPD_TWR
-	int "[17]: Min Write Recovery Time, tWR"
-	default 210
-	range 1 255
-
-config CUSTOM_SPD_TRCD
-	int "[18]: Min RAS# to CAS# Delay Time, tRCD"
-	default 132
-	range 1 255
-
-config CUSTOM_SPD_TRRD
-	int "[19]: Min Row Active to Row Active Delay Time, tRRD"
-	default 84
-	range 1 255
-
-config CUSTOM_SPD_TRP
-	int "[20]: Min Row Precharge Delay Time, tRP"
-	default 132
-	range 1 255
-
-config CUSTOM_SPD_UPPER_TRC
-	int "[21][7:4]: Min Active to Active/Refresh Delay, UPPER tRC"
-	default 2
-	range 0 16
-
-config CUSTOM_SPD_UPPER_TRAS
-	int "[21][3:0]: Min Active to Precharge Delay Time, UPPER tRAS"
-	default 1
-	range 0 16
-
-config CUSTOM_SPD_TRAS
-	int "[22]: Min Active to Precharge Delay Time, LOWER tRAS"
-	default 138
-	range 1 255
-
-config CUSTOM_SPD_TRC
-	int "[23]: Min Active to Active/Refresh Delay, LOWER tRC"
-	default 181
-	range 1 255
-
-config CUSTOM_SPD_TWTR
-	int "[26]: Min Internal Write to Read Command Delay, tWTR"
-	default 105
-	range 1 255
-
-config CUSTOM_SPD_TRTP
-	int "[27]: Min Internal Read to Precharge Command Delay, tRTP"
-	default 105
-	range 1 255
-
-config CUSTOM_SPD_UPPER_TFAW
-	int "[28][3:0]: Min Four Activate Window Delay, UPPER tFAW"
-	default 1
-	range 0 16
-
-config CUSTOM_SPD_TFAW
-	int "[29]: Min Four Activate Window Delay Time, tFAW"
-	default 164
-	range 1 255
-
-endif
diff --git a/src/vendorcode/amd/agesa/Makefile.inc b/src/vendorcode/amd/agesa/Makefile.inc
deleted file mode 100644
index 9d7819561f..0000000000
--- a/src/vendorcode/amd/agesa/Makefile.inc
+++ /dev/null
@@ -1,41 +0,0 @@
-
-ifeq ($(CONFIG_CPU_AMD_AGESA),y)
-
-subdirs-y += common
-
-classes-y += libagesa
-libagesa-y =
-libagesa-generic-ccopts += -D__LIBAGESA__
-libagesa-generic-ccopts += $(AGESA_INC) $(AGESA_AUTOINCLUDES)
-libagesa-generic-ccopts += -Wno-pragma-pack -Wno-unused-but-set-variable
-libagesa-generic-ccopts += -Wno-implicit-fallthrough
-
-romstage-generic-ccopts += -Wno-pragma-pack
-ramstage-generic-ccopts += -Wno-pragma-pack
-
-AGESA_CFLAGS := -march=k8-sse3 -mtune=k8-sse3 -fno-strict-aliasing
-
-CFLAGS_x86_32 += $(AGESA_CFLAGS)
-CFLAGS_x86_64 += $(AGESA_CFLAGS)
-
-ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
-$(eval $(call create_class_compiler,libagesa,x86_32))
-else
-$(eval $(call create_class_compiler,libagesa,x86_64))
-endif
-
-$(obj)/libagesa.a: $$(libagesa-objs)
-	@printf "    AGESA        $(subst $(obj)/,,$(@))\n"
-	$(AR_libagesa) rcsDT $@ $+
-
-romstage-libs  += $(obj)/libagesa.a
-ramstage-libs  += $(obj)/libagesa.a
-
-# buildOpts should be in libagesa
-$(obj)/romstage/mainboard/$(MAINBOARDDIR)/buildOpts.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES)
-$(obj)/ramstage/mainboard/$(MAINBOARDDIR)/buildOpts.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES)
-
-$(obj)/romstage/vendorcode/amd/agesa/common/agesa-entry.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES)
-$(obj)/ramstage/vendorcode/amd/agesa/common/agesa-entry.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES)
-
-endif
diff --git a/src/vendorcode/amd/agesa/common/Makefile.inc b/src/vendorcode/amd/agesa/common/Makefile.inc
deleted file mode 100644
index a7ddc7f04a..0000000000
--- a/src/vendorcode/amd/agesa/common/Makefile.inc
+++ /dev/null
@@ -1,36 +0,0 @@
-#*****************************************************************************
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-#     * Redistributions of source code must retain the above copyright
-#       notice, this list of conditions and the following disclaimer.
-#     * Redistributions in binary form must reproduce the above copyright
-#       notice, this list of conditions and the following disclaimer in the
-#       documentation and/or other materials provided with the distribution.
-#     * Neither the name of Advanced Micro Devices, Inc. nor the names of
-#       its contributors may be used to endorse or promote products derived
-#       from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
-# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-#*****************************************************************************
-
-romstage-y += agesa-entry.c
-ramstage-y += agesa-entry.c
-
-libagesa-y += debug_util.c
-libagesa-y += amdlib.c
-
-# Do not optimise performance-critical low-level IO for size with -Os,
-# request -O2 with -falign-functions.
-
-$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h b/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
deleted file mode 100644
index 3302574349..0000000000
--- a/src/vendorcode/amd/agesa/common/agesa-entry-cfg.h
+++ /dev/null
@@ -1,82 +0,0 @@
-#ifndef AGESA_ENTRY_CFG_H
-#define AGESA_ENTRY_CFG_H
-
-
-#if ENV_RAMINIT
-
-#define AGESA_ENTRY_INIT_RESET		TRUE
-#define AGESA_ENTRY_INIT_EARLY		TRUE
-#define AGESA_ENTRY_INIT_POST		TRUE
-
-#define AGESA_ENTRY_INIT_RESUME		CONFIG(HAVE_ACPI_RESUME)
-
-#else
-
-#define AGESA_ENTRY_INIT_ENV		TRUE
-#define AGESA_ENTRY_INIT_LATE_RESTORE	CONFIG(HAVE_ACPI_RESUME)
-
-#define AGESA_ENTRY_INIT_MID		TRUE
-#define AGESA_ENTRY_INIT_LATE		TRUE
-#define AGESA_ENTRY_INIT_S3SAVE \
-		(CONFIG(HAVE_ACPI_RESUME) || \
-		 CONFIG(ENABLE_MRC_CACHE))
-
-#endif
-
-/* Not required. */
-#define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-
-/* Required for any multi-core. */
-#define AGESA_ENTRY_LATE_RUN_AP_TASK    TRUE
-
-/* Deprecated, reference source is removed from the tree. */
-#define AGESA_ENTRY_INIT_RECOVERY                    FALSE
-
-/* Defaults below. */
-
-/*  Process user desired AGESA entry points  */
-#ifndef AGESA_ENTRY_INIT_RESET
-  #define AGESA_ENTRY_INIT_RESET                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
-  #define AGESA_ENTRY_INIT_EARLY                     FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
-  #define AGESA_ENTRY_INIT_POST                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
-  #define AGESA_ENTRY_INIT_ENV                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
-  #define AGESA_ENTRY_INIT_MID                       FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
-  #define AGESA_ENTRY_INIT_LATE                      FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
-  #define AGESA_ENTRY_INIT_S3SAVE                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
-  #define AGESA_ENTRY_INIT_RESUME                    FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
-  #define AGESA_ENTRY_INIT_LATE_RESTORE              FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
-  #define AGESA_ENTRY_INIT_GENERAL_SERVICES          FALSE
-#endif
-
-#ifndef AGESA_ENTRY_LATE_RUN_AP_TASK
-  #define AGESA_ENTRY_LATE_RUN_AP_TASK               TRUE
-#endif
-
-#endif /* AGESA_ENTRY_CFG_H */
diff --git a/src/vendorcode/amd/agesa/common/agesa-entry.c b/src/vendorcode/amd/agesa/common/agesa-entry.c
deleted file mode 100644
index 42f12b3950..0000000000
--- a/src/vendorcode/amd/agesa/common/agesa-entry.c
+++ /dev/null
@@ -1,165 +0,0 @@
-#include <Porting.h>
-#include <AMD.h>
-#include <AGESA.h>
-
-#include "CommonReturns.h"
-
-#include <heapManager.h>
-#include <CreateStruct.h>
-
-#include <Options.h>
-
-#include <agesa-entry-cfg.h>
-
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET,
-      sizeof (AMD_RESET_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResetConstructor,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_RESET_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY,
-      sizeof (AMD_EARLY_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_EARLY_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV,
-      sizeof (AMD_ENV_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_ENV_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE,
-      sizeof (AMD_LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitLateInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
-      AMD_INIT_LATE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID,
-      sizeof (AMD_MID_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitMidInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_INIT_MID_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST,
-      sizeof (AMD_POST_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitPostInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
-      AMD_INIT_POST_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME,
-      sizeof (AMD_RESUME_PARAMS),
-      (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
-      AMD_INIT_RESUME_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE,
-      sizeof (AMD_S3LATE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_S3_LATE_RESTORE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE,
-      sizeof (AMD_S3SAVE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
-      (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
-      AMD_S3_SAVE_HANDLE
-    },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK,
-      sizeof (AP_EXE_PARAMS),
-      (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
-      (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
-      AMD_LATE_RUN_AP_TASK_HANDLE
-    },
-  #endif
-  { 0, 0, NULL }
-};
-
-CONST UINTN InitializerCount = ARRAY_SIZE(FuncParamsInfo);
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
-  { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
-  { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
-  #if AGESA_ENTRY_INIT_RESET == TRUE
-    { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
-  #endif
-
-  #if AGESA_ENTRY_INIT_EARLY == TRUE
-    { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
-  #endif
-
-  #if AGESA_ENTRY_INIT_POST == TRUE
-    { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
-  #endif
-
-  #if AGESA_ENTRY_INIT_ENV == TRUE
-    { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
-  #endif
-
-  #if AGESA_ENTRY_INIT_MID == TRUE
-    { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE == TRUE
-    { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
-  #endif
-
-  #if AGESA_ENTRY_INIT_S3SAVE == TRUE
-    { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
-  #endif
-
-  #if AGESA_ENTRY_INIT_RESUME == TRUE
-    { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
-  #endif
-
-  #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
-    { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
-  #endif
-
-    { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
-
-  #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
-    { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
-    { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
-    { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
-    { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
-    { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
-  #endif
-
-  #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
-    { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
-  #endif
-  { 0, NULL }
-};
diff --git a/src/vendorcode/amd/agesa/common/amdlib.c b/src/vendorcode/amd/agesa/common/amdlib.c
deleted file mode 100644
index dbfdce877e..0000000000
--- a/src/vendorcode/amd/agesa/common/amdlib.c
+++ /dev/null
@@ -1,1266 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Lib
- * @e \$Revision: 44325 $   @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-
-/*----------------------------------------------------------------------------------------
- *                             M O D U L E S    U S E D
- *----------------------------------------------------------------------------------------
- */
-
-#include "AGESA.h"
-#include "Ids.h"
-#include "cpuRegisters.h"
-#include "amdlib.h"
-#include "Filecode.h"
-CODE_GROUP (G1_PEICC)
-RDATA_GROUP (G1_PEICC)
-
-#define FILECODE LIB_AMDLIB_FILECODE
-
-/*----------------------------------------------------------------------------------------
- *                   D E F I N I T I O N S    A N D    M A C R O S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- *                  T Y P E D E F S     A N D     S T R U C T U R E S
- *----------------------------------------------------------------------------------------
- */
-
-
-/*----------------------------------------------------------------------------------------
- *           P R O T O T Y P E S     O F     L O C A L     F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-
-
-BOOLEAN
-STATIC
-GetPciMmioAddress (
-     OUT   UINT64            *MmioAddress,
-     OUT   UINT32            *MmioSize,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       CONST VOID   *Data,
-  IN       CONST VOID   *DataMask,
-     OUT   UINT32       *TemData,
-     OUT   UINT32       *TempDataMask
-  );
-
-/*----------------------------------------------------------------------------------------
- *                          E X P O R T E D    F U N C T I O N S
- *----------------------------------------------------------------------------------------
- */
-UINT8
-ReadIo8 (
-  IN       UINT16 Address
-  )
-{
-  return __inbyte (Address);
-}
-UINT16
-ReadIo16 (
-  IN       UINT16 Address
-  )
-{
-  return __inword (Address);
-}
-UINT32
-ReadIo32 (
-  IN       UINT16 Address
-  )
-{
-  return __indword (Address);
-}
-VOID
-WriteIo8 (
-  IN       UINT16 Address,
-  IN       UINT8 Data
-  )
-{
-  __outbyte (Address, Data);
-}
-VOID
-WriteIo16 (
-  IN       UINT16 Address,
-  IN       UINT16 Data
-  )
-{
-  __outword (Address, Data);
-}
-VOID
-WriteIo32 (
-  IN       UINT16 Address,
-  IN       UINT32 Data
-  )
-{
-   __outdword (Address, Data);
-}
-STATIC
-UINT64 SetFsBase (
-  UINT64 address
-  )
-{
-  UINT64 hwcr;
-  hwcr = __readmsr (0xC0010015);
-  __writemsr (0xC0010015, hwcr | 1 << 17);
-  __writemsr (0xC0000100, address);
-  return hwcr;
-}
-STATIC
-VOID
-RestoreHwcr (
-  UINT64
-  value
-  )
-{
-  __writemsr (0xC0010015, value);
-}
-UINT8
-Read64Mem8 (
-  IN       UINT64 Address
-  )
-{
-  UINT8 dataRead;
-  UINT64 hwcrSave;
-  if ((Address >> 32) == 0) {
-    return *(volatile UINT8 *) (UINTN) Address;
-  }
-  hwcrSave = SetFsBase (Address);
-  dataRead = __readfsbyte (0);
-  RestoreHwcr (hwcrSave);
-  return dataRead;
-}
-UINT16
-Read64Mem16 (
-  IN       UINT64 Address
-  )
-{
-  UINT16 dataRead;
-  UINT64 hwcrSave;
-  if ((Address >> 32) == 0) {
-    return *(volatile UINT16 *) (UINTN) Address;
-  }
-  hwcrSave = SetFsBase (Address);
-  dataRead = __readfsword (0);
-  RestoreHwcr (hwcrSave);
-  return dataRead;
-}
-UINT32
-Read64Mem32 (
-  IN       UINT64 Address
-  )
-{
-  UINT32 dataRead;
-  UINT64 hwcrSave;
-  if ((Address >> 32) == 0) {
-    return *(volatile UINT32 *) (UINTN) Address;
-  }
-  hwcrSave = SetFsBase (Address);
-  dataRead = __readfsdword (0);
-  RestoreHwcr (hwcrSave);
-  return dataRead;
-  }
-VOID
-Write64Mem8 (
-  IN       UINT64 Address,
-  IN       UINT8 Data
-  )
-{
-  if ((Address >> 32) == 0){
-    *(volatile UINT8 *) (UINTN) Address = Data;
-  }
-  else {
-    UINT64 hwcrSave;
-    hwcrSave = SetFsBase (Address);
-    __writefsbyte (0, Data);
-    RestoreHwcr (hwcrSave);
-  }
-}
-VOID
-Write64Mem16 (
-  IN       UINT64 Address,
-  IN       UINT16 Data
-  )
-{
- if ((Address >> 32) == 0){
-   *(volatile UINT16 *) (UINTN) Address = Data;
- }
- else {
-   UINT64 hwcrSave;
-   hwcrSave = SetFsBase (Address);
-   __writefsword (0, Data);
-   RestoreHwcr (hwcrSave);
- }
-}
-VOID
-Write64Mem32 (
-  IN       UINT64 Address,
-  IN       UINT32 Data
-  )
-{
-  if ((Address >> 32) == 0){
-    *(volatile UINT32 *) (UINTN) Address = Data;
-  }
-  else {
-    UINT64 hwcrSave;
-    hwcrSave = SetFsBase (Address);
-    __writefsdword (0, Data);
-    RestoreHwcr (hwcrSave);
-  }
-}
-VOID
-LibAmdReadCpuReg (
-  IN       UINT8 RegNum,
-     OUT   UINT32 *Value
-  )
-{
-    *Value = 0;
-    switch (RegNum){
-    case CR4_REG:
-      *Value = __readcr4 ();
-      break;
-    case DR0_REG:
-      *Value = __readdr (0);
-      break;
-    case DR1_REG:
-      *Value = __readdr (1);
-      break;
-    case DR2_REG:
-      *Value = __readdr (2);
-      break;
-    case DR3_REG:
-      *Value = __readdr (3);
-      break;
-    case DR7_REG:
-      *Value = __readdr (7);
-      break;
-    default:
-      *Value = -1;
-      break;
-  }
-}
-VOID
-LibAmdWriteCpuReg (
-  IN       UINT8 RegNum,
-  IN       UINT32 Value
-  )
-{
-   switch (RegNum){
-    case CR4_REG:
-      __writecr4 (Value);
-      break;
-    case DR0_REG:
-      __writedr (0, Value);
-      break;
-    case DR1_REG:
-      __writedr (1, Value);
-      break;
-    case DR2_REG:
-      __writedr (2, Value);
-      break;
-    case DR3_REG:
-      __writedr (3, Value);
-      break;
-    case DR7_REG:
-      __writedr (7, Value);
-      break;
-    default:
-      break;
-  }
-}
-VOID
-LibAmdWriteBackInvalidateCache (
-  IN       VOID
-  )
-{
-  __wbinvd ();
-}
-VOID
-LibAmdHDTBreakPoint (
-  VOID
-  )
-{
-  __writemsr (0xC001100A, __readmsr (0xC001100A) | 1);
-  __debugbreak (); // do you really need icebp? If so, go back to asm code
-}
-UINT8
-LibAmdBitScanForward (
-  IN       UINT32 value
-  )
-{
-  UINTN Index;
-  for (Index = 0; Index < 32; Index++){
-    if (value & (1 << Index)) break;
-  }
-  return (UINT8) Index;
-}
-
-UINT8
-LibAmdBitScanReverse (
-  IN       UINT32 value
-)
-{
-  uint8_t bit = 31;
-  do {
-    if (value & (1 << 31))
-      return bit;
-
-    value <<= 1;
-    bit--;
-
-  } while (value != 0);
-
-  return 0xFF; /* Error code indicating no bit found */
-}
-
-VOID
-LibAmdMsrRead (
-  IN       UINT32 MsrAddress,
-     OUT   UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *ConfigPtr
-  )
-{
-  *Value = __readmsr (MsrAddress);
-}
-VOID
-LibAmdMsrWrite (
-  IN       UINT32 MsrAddress,
-  CONST IN       UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *ConfigPtr
-  )
-{
-  __writemsr (MsrAddress, *Value);
-}
-void LibAmdCpuidRead (
-  IN       UINT32 CpuidFcnAddress,
-     OUT   CPUID_DATA* Value,
-  IN OUT   AMD_CONFIG_PARAMS *ConfigPtr
-  )
-{
-  __cpuid ((int *)Value, CpuidFcnAddress);
-}
-UINT64
-ReadTSC (
-  VOID
-  )
-{
-  return __rdtsc ();
-}
-VOID
-LibAmdSimNowEnterDebugger (
-  VOID
-  )
-{
-  STATIC CONST UINT8 opcode [] = {0x60,                             // pushad
-                                   0xBB, 0x02, 0x00, 0x00, 0x00,     // mov ebx, 2
-                                   0xB8, 0x0B, 0xD0, 0xCC, 0xBA,     // mov eax, 0xBACCD00B
-                                   0x0F, 0xA2,                       // cpuid
-                                   0x61,                             // popad
-                                   0xC3                              // ret
-                                 };
-  ((VOID (*)(VOID)) (size_t) opcode) (); // call the function
-}
-
-#ifdef __SSE3__
-VOID F10RevDProbeFilterCritical (
-  IN       PCI_ADDR PciAddress,
-  IN       UINT32   PciRegister
-  )
-{
-  UINT64 msrsave;
-  msrsave = __readmsr (0xC001001F);
-  __writemsr (0xC001001F, msrsave | 1ULL << 46);  // EnableCf8ExtCfg
-  _mm_mfence ();
-  __outdword (0xCF8, PciAddress.AddressValue);
-  _mm_mfence ();
-  __outdword (0xCFC, PciRegister | 2);
-  _mm_mfence ();
-  __writemsr (0xC001001F, msrsave);
-}
-
-VOID
-LibAmdCLFlush (
-  IN       UINT64 Address,
-  IN       UINT8  Count
-  )
-{
-  UINT64 hwcrSave;
-  UINT8  *address32;
-  UINTN  Index;
-  address32 = 0;
-  hwcrSave = SetFsBase (Address);
-  for (Index = 0; Index < Count; Index++){
-    _mm_mfence ();
-    _mm_clflush_fs (&address32 [Index * 64]);
-  }
-  RestoreHwcr (hwcrSave);
-}
-#endif //__SSE3__
-
-VOID
-StopHere (
-  VOID
-  )
-{
-  VOLATILE UINTN x = 1;
-  while (x);
-}
-
-VOID
-LibAmdFinit()
-{
-	/* TODO: finit */
-	__asm__ volatile ("finit");
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read IO port
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] IoAddress     IO port address
- * @param[in] Value         Pointer to save data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdIoRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  switch (AccessWidth) {
-    case AccessWidth8:
-    case AccessS3SaveWidth8:
-      *(UINT8 *) Value = ReadIo8 (IoAddress);
-      break;
-    case AccessWidth16:
-    case AccessS3SaveWidth16:
-      *(UINT16 *) Value = ReadIo16 (IoAddress);
-      break;
-    case AccessWidth32:
-    case AccessS3SaveWidth32:
-      *(UINT32 *) Value = ReadIo32 (IoAddress);
-      break;
-  default:
-    ASSERT (FALSE);
-    break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write IO port
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] IoAddress     IO port address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdIoWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  switch (AccessWidth) {
-    case AccessWidth8:
-    case AccessS3SaveWidth8:
-      WriteIo8 (IoAddress, *(UINT8 *) Value);
-      break;
-    case AccessWidth16:
-    case AccessS3SaveWidth16:
-      WriteIo16 (IoAddress, *(UINT16 *) Value);
-      break;
-    case AccessWidth32:
-    case AccessS3SaveWidth32:
-      WriteIo32 (IoAddress, *(UINT32 *) Value);
-      break;
-    default:
-     ASSERT (FALSE);
-     break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * IO read modify write
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] IoAddress     IO address
- * @param[in] Data          OR data
- * @param[in] DataMask      Mask to be used before data write back to register.
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdIoRMW (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32  TempData = 0;
-  UINT32  TempMask = 0;
-  UINT32  Value = 0;
-  LibAmdGetDataFromPtr (AccessWidth, Data,  DataMask, &TempData, &TempMask);
-  LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
-  Value = (Value & (~TempMask)) | TempData;
-  LibAmdIoWrite (AccessWidth, IoAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll IO register
- *
- *  Poll register until (RegisterValue & DataMask) ==  Data
- *
- * @param[in] AccessWidth   Access width
- * @param[in] IoAddress     IO address
- * @param[in] Data          Data to compare
- * @param[in] DataMask      And mask
- * @param[in] Delay         Poll for time in 100ns (not supported)
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdIoPoll (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN       UINT64 Delay,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32  TempData = 0;
-  UINT32  TempMask = 0;
-  UINT32  Value;
-  LibAmdGetDataFromPtr (AccessWidth, Data,  DataMask, &TempData, &TempMask);
-  do {
-    LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
-  } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read memory/MMIO
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] MemAddress    Memory address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdMemRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  switch (AccessWidth) {
-    case AccessWidth8:
-    case AccessS3SaveWidth8:
-      *(UINT8 *) Value = Read64Mem8 (MemAddress);
-      break;
-    case AccessWidth16:
-    case AccessS3SaveWidth16:
-      *(UINT16 *) Value = Read64Mem16 (MemAddress);
-      break;
-    case AccessWidth32:
-    case AccessS3SaveWidth32:
-      *(UINT32 *) Value = Read64Mem32 (MemAddress);
-      break;
-    default:
-      ASSERT (FALSE);
-      break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write memory/MMIO
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] MemAddress    Memory address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdMemWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-
-  switch (AccessWidth) {
-    case AccessWidth8:
-    case AccessS3SaveWidth8:
-      Write64Mem8 (MemAddress, *((UINT8 *) Value));
-      break;
-    case AccessWidth16:
-    case AccessS3SaveWidth16:
-      Write64Mem16 (MemAddress, *((UINT16 *) Value));
-      break;
-    case AccessWidth32:
-    case AccessS3SaveWidth32:
-      Write64Mem32 (MemAddress, *((UINT32 *) Value));
-      break;
-    default:
-      ASSERT (FALSE);
-      break;
-  }
-}
-/*---------------------------------------------------------------------------------------*/
-/**
- * Memory/MMIO read modify write
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] MemAddress    Memory address
- * @param[in] Data          OR data
- * @param[in] DataMask      Mask to be used before data write back to register.
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdMemRMW (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32  TempData = 0;
-  UINT32  TempMask = 0;
-  UINT32  Value;
-  LibAmdGetDataFromPtr (AccessWidth, Data,  DataMask, &TempData, &TempMask);
-  LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
-  Value = (Value & (~TempMask)) | TempData;
-  LibAmdMemWrite (AccessWidth, MemAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll Mmio
- *
- *  Poll register until (RegisterValue & DataMask) ==  Data
- *
- * @param[in] AccessWidth   Access width
- * @param[in] MemAddress    Memory address
- * @param[in] Data          Data to compare
- * @param[in] DataMask      AND mask
- * @param[in] Delay         Poll for time in 100ns (not supported)
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdMemPoll (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN       UINT64 Delay,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32  TempData = 0;
-  UINT32  TempMask = 0;
-  UINT32  Value;
-  LibAmdGetDataFromPtr (AccessWidth, Data,  DataMask, &TempData, &TempMask);
-  do {
-    LibAmdMemRead (AccessWidth, MemAddress, &Value, StdHeader);
-  } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read PCI config space
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] PciAddress    Pci address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdPciRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32 LegacyPciAccess;
-  UINT32 MMIOSize;
-  UINT64 RMWrite;
-  UINT64 RMWritePrevious;
-  UINT64 MMIOAddress;
-
-  ASSERT (StdHeader != NULL);
-  ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
-  if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
-    // We need to convert our "portable" PCI address into a "real" PCI access
-    LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
-    if (PciAddress.Address.Register <= 0xFF) {
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
-      LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
-    } else {
-      LibAmdMsrRead  (NB_CFG, &RMWritePrevious, StdHeader);
-      RMWrite = RMWritePrevious | 0x0000400000000000ull;
-      LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
-      LibAmdIoRead (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
-      LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
-    }
-  } else {
-    // Setup the MMIO address
-    ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
-    MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
-    LibAmdMemRead (AccessWidth, MMIOAddress, Value, StdHeader);
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write PCI config space
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] PciAddress    Pci address
- * @param[in] Value         Pointer to data
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdPciWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32 LegacyPciAccess;
-  UINT32 MMIOSize;
-  UINT64 RMWrite;
-  UINT64 RMWritePrevious;
-  UINT64 MMIOAddress;
-
-  ASSERT (StdHeader != NULL);
-  ASSERT (PciAddress.AddressValue != ILLEGAL_SBDFO);
-  if (!GetPciMmioAddress (&MMIOAddress, &MMIOSize, StdHeader)) {
-    // We need to convert our "portable" PCI address into a "real" PCI access
-    LegacyPciAccess = ((1 << 31) + (PciAddress.Address.Register & 0xFC) + (PciAddress.Address.Function << 8) + (PciAddress.Address.Device << 11) + (PciAddress.Address.Bus << 16) + ((PciAddress.Address.Register & 0xF00) << (24 - 8)));
-    if (PciAddress.Address.Register <= 0xFF) {
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
-      LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
-    } else {
-      LibAmdMsrRead  (NB_CFG, &RMWritePrevious, StdHeader);
-      RMWrite = RMWritePrevious | 0x0000400000000000ull;
-      LibAmdMsrWrite (NB_CFG, &RMWrite, StdHeader);
-      LibAmdIoWrite (AccessWidth32, IOCF8, &LegacyPciAccess, StdHeader);
-      LibAmdIoWrite (AccessWidth, IOCFC + (UINT16) (PciAddress.Address.Register & 0x3), Value, StdHeader);
-      LibAmdMsrWrite (NB_CFG, &RMWritePrevious, StdHeader);
-    }
-  } else {
-    // Setup the MMIO address
-    ASSERT ((MMIOAddress + MMIOSize) > (MMIOAddress + (PciAddress.AddressValue & 0x0FFFFFFF)));
-    MMIOAddress += (PciAddress.AddressValue & 0x0FFFFFFF);
-    LibAmdMemWrite (AccessWidth, MMIOAddress, Value, StdHeader);
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * PCI read modify write
- *
- *
- * @param[in] AccessWidth   Access width
- * @param[in] PciAddress    Pci address
- * @param[in] Data          OR Data
- * @param[in] DataMask      Mask to be used before data write back to register.
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdPciRMW (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32  TempData = 0;
-  UINT32  TempMask = 0;
-  UINT32  Value;
-  LibAmdGetDataFromPtr (AccessWidth, Data,  DataMask, &TempData, &TempMask);
-  LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
-  Value = (Value & (~TempMask)) | TempData;
-  LibAmdPciWrite (AccessWidth, PciAddress, &Value, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Poll PCI config space register
- *
- *  Poll register until (RegisterValue & DataMask) ==  Data
- *
- * @param[in] AccessWidth   Access width
- * @param[in] PciAddress    Pci address
- * @param[in] Data          Data to compare
- * @param[in] DataMask      AND mask
- * @param[in] Delay         Poll for time in 100ns (not supported)
- * @param[in] StdHeader     Standard configuration header
- *
- */
-VOID
-LibAmdPciPoll (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN       UINT64 Delay,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32  TempData = 0;
-  UINT32  TempMask = 0;
-  UINT32  Value;
-  LibAmdGetDataFromPtr (AccessWidth, Data,  DataMask, &TempData, &TempMask);
-  do {
-    LibAmdPciRead (AccessWidth, PciAddress, &Value, StdHeader);
-  } while (TempData != (Value & TempMask));
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Get MMIO base address for PCI accesses
- *
- * @param[out] MmioAddress   PCI MMIO base address
- * @param[out] MmioSize      Size of region in bytes
- * @param[in]  StdHeader     Standard configuration header
- *
- * @retval    TRUE          MmioAddress/MmioSize are valid
- */
-BOOLEAN
-STATIC
-GetPciMmioAddress (
-     OUT   UINT64            *MmioAddress,
-     OUT   UINT32            *MmioSize,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  BOOLEAN MmioIsEnabled;
-  UINT32  EncodedSize;
-  UINT64  MsrReg;
-
-  ASSERT (StdHeader != NULL);
-
-  MmioIsEnabled = FALSE;
-  LibAmdMsrRead (MSR_MMIO_Cfg_Base, &MsrReg, StdHeader);
-  if ((MsrReg & BIT0) != 0) {
-    *MmioAddress = MsrReg & 0xFFFFFFFFFFF00000ull;
-    EncodedSize = (UINT32) ((MsrReg & 0x3C) >> 2);
-    *MmioSize = ((1 << EncodedSize) * 0x100000);
-    MmioIsEnabled = TRUE;
-  }
-  return MmioIsEnabled;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Read field of PCI config register.
- *
- *
- *
- * @param[in]   Address       Pci address  (register must be DWORD aligned)
- * @param[in]   Highbit       High bit position of the field in DWORD
- * @param[in]   Lowbit        Low bit position of the field in DWORD
- * @param[out]  Value         Pointer to data
- * @param[in]   StdHeader     Standard configuration header
- */
-VOID
-LibAmdPciReadBits (
-  IN       PCI_ADDR Address,
-  IN       UINT8 Highbit,
-  IN       UINT8 Lowbit,
-     OUT   UINT32 *Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
-  LibAmdPciRead (AccessWidth32, Address, Value, StdHeader);
-  *Value >>= Lowbit;  // Shift
-
-  // A 1 << 32 == 1 << 0 due to x86 SHL instruction, so skip if that is the case
-
-  if ((Highbit - Lowbit) != 31) {
-    *Value &= (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Write field of PCI config register.
- *
- *
- *
- * @param[in]   Address       Pci address  (register must be DWORD aligned)
- * @param[in]   Highbit       High bit position of the field in DWORD
- * @param[in]   Lowbit        Low bit position of the field in DWORD
- * @param[in]   Value         Pointer to data
- * @param[in]   StdHeader     Standard configuration header
- */
-VOID
-LibAmdPciWriteBits (
-  IN       PCI_ADDR Address,
-  IN       UINT8 Highbit,
-  IN       UINT8 Lowbit,
-  IN       CONST UINT32 *Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32 Temp;
-  UINT32 Mask;
-
-  ASSERT (Highbit < 32 && Lowbit < 32 && Highbit >= Lowbit && (Address.AddressValue & 3) == 0);
-
-  // A 1<<32 == 1<<0 due to x86 SHL instruction, so skip if that is the case
-
-  if ((Highbit - Lowbit) != 31) {
-    Mask = (((UINT32) 1 << (Highbit - Lowbit + 1)) - 1);
-  } else {
-    Mask = (UINT32) 0xFFFFFFFF;
-  }
-
-  LibAmdPciRead (AccessWidth32, Address, &Temp, StdHeader);
-  Temp &= ~(Mask << Lowbit);
-  Temp |= (*Value & Mask) << Lowbit;
-  LibAmdPciWrite (AccessWidth32, Address, &Temp, StdHeader);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Locate next capability pointer
- *
- *  Given a SBDFO this routine will find the next PCI capabilities list entry.
- *  if the end of the list is reached, or if a problem is detected, then ILLEGAL_SBDFO is
- *  returned.
- *  To start a new search from the head of the list, specify a SBDFO with an offset of zero.
- *
- * @param[in,out] Address       Pci address
- * @param[in]     StdHeader     Standard configuration header
- */
-
-VOID
-LibAmdPciFindNextCap (
-  IN OUT   PCI_ADDR *Address,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  PCI_ADDR Base;
-  UINT32 Offset;
-  UINT32 Temp;
-  PCI_ADDR TempAddress;
-
-  ASSERT (Address != NULL);
-  ASSERT (*(UINT32 *) Address != ILLEGAL_SBDFO);
-
-  Base.AddressValue = Address->AddressValue;
-  Offset = Base.Address.Register;
-  Base.Address.Register = 0;
-
-  Address->AddressValue = (UINT32) ILLEGAL_SBDFO;
-
-  // Verify that the SBDFO points to a valid PCI device SANITY CHECK
-  LibAmdPciRead (AccessWidth32, Base, &Temp, StdHeader);
-  if (Temp == 0xFFFFFFFF) {
-    ASSERT (FALSE);
-    return; // There is no device at this address
-  }
-
-  // Verify that the device supports a capability list
-  TempAddress.AddressValue = Base.AddressValue + 0x04;
-  LibAmdPciReadBits (TempAddress, 20, 20, &Temp, StdHeader);
-  if (Temp == 0) {
-    return; // This PCI device does not support capability lists
-  }
-
-  if (Offset != 0) {
-    // If we are continuing on an existing list
-    TempAddress.AddressValue = Base.AddressValue + Offset;
-    LibAmdPciReadBits (TempAddress, 15, 8, &Temp, StdHeader);
-  } else {
-    // We are starting on a new list
-    TempAddress.AddressValue = Base.AddressValue + 0x34;
-    LibAmdPciReadBits (TempAddress, 7, 0, &Temp, StdHeader);
-  }
-
-  if (Temp == 0) {
-    return; // We have reached the end of the capabilities list
-  }
-
-  // Error detection and recovery- The statement below protects against
-  //   PCI devices with broken PCI capabilities lists.  Detect a pointer
-  //   that is not uint32 aligned, points into the first 64 reserved DWORDs
-  //   or points back to itself.
-  if (((Temp & 3) != 0) || (Temp == Offset) || (Temp < 0x40)) {
-    ASSERT (FALSE);
-    return;
-  }
-
-  Address->AddressValue = Base.AddressValue + Temp;
-  return;
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Set memory with value
- *
- *
- * @param[in,out] Destination   Pointer to memory range
- * @param[in]     Value         Value to set memory with
- * @param[in]     FillLength    Size of the memory range
- * @param[in]     StdHeader     Standard configuration header (Optional)
- */
-VOID
-LibAmdMemFill (
-  IN       VOID *Destination,
-  IN       UINT8 Value,
-  IN       UINTN FillLength,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT8 *Dest;
-  ASSERT (StdHeader != NULL);
-  Dest = Destination;
-  while ((FillLength--) != 0) {
-    *Dest++ = Value;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Copy memory
- *
- *
- * @param[in,out] Destination   Pointer to destination buffer
- * @param[in]     Source        Pointer to source buffer
- * @param[in]     CopyLength    buffer length
- * @param[in]     StdHeader     Standard configuration header (Optional)
- */
-VOID
-LibAmdMemCopy (
-  IN       VOID *Destination,
-  IN       CONST VOID *Source,
-  IN       UINTN CopyLength,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT8 *Dest;
-  CONST UINT8 *SourcePtr;
-  ASSERT (StdHeader != NULL);
-  Dest = Destination;
-  SourcePtr = Source;
-  while ((CopyLength--) != 0) {
-    *Dest++ = *SourcePtr++;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in]     StdHeader     Standard configuration header (Optional)
- */
-
-//  Returns the package type mask for the processor
-UINT32
-LibAmdGetPackageType (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  )
-{
-  UINT32      ProcessorPackageType;
-  CPUID_DATA  CpuId;
-
-  LibAmdCpuidRead (0x80000001, &CpuId, StdHeader);
-  ProcessorPackageType = (UINT32) (CpuId.EBX_Reg >> 28) & 0xF; // bit 31:28
-  return (UINT32) (1 << ProcessorPackageType);
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in]     AccessWidth     Access width
- * @param[in]     Data            data
- * @param[in]     DataMask        data
- * @param[out]    TemData         typecast data
- * @param[out]    TempDataMask    typecast data
- */
-
-
-VOID
-STATIC
-LibAmdGetDataFromPtr (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       CONST VOID   *Data,
-  IN       CONST VOID   *DataMask,
-     OUT   UINT32       *TemData,
-     OUT   UINT32       *TempDataMask
-  )
-{
-  switch (AccessWidth) {
-    case AccessWidth8:
-    case AccessS3SaveWidth8:
-      *TemData = (UINT32)*(UINT8 *) Data;
-      *TempDataMask = (UINT32)*(UINT8 *) DataMask;
-      break;
-    case AccessWidth16:
-    case AccessS3SaveWidth16:
-      *TemData = (UINT32)*(UINT16 *) Data;
-      *TempDataMask = (UINT32)*(UINT16 *) DataMask;
-      break;
-    case AccessWidth32:
-    case AccessS3SaveWidth32:
-      *TemData = *(UINT32 *) Data;
-      *TempDataMask = *(UINT32 *) DataMask;
-      break;
-    default:
-      IDS_ERROR_TRAP;
-      break;
-  }
-}
-
-/*---------------------------------------------------------------------------------------*/
-/**
- * Returns the package type mask for the processor
- *
- *
- * @param[in]     AccessWidth     Access width
- * @retval        Width in number of bytes
- */
-
-
-UINT8
-LibAmdAccessWidth (
-  IN       ACCESS_WIDTH AccessWidth
-  )
-{
-  UINT8 Width;
-
-  switch (AccessWidth) {
-    case AccessWidth8:
-    case AccessS3SaveWidth8:
-      Width = 1;
-      break;
-    case AccessWidth16:
-    case AccessS3SaveWidth16:
-      Width = 2;
-      break;
-    case AccessWidth32:
-    case AccessS3SaveWidth32:
-      Width = 4;
-      break;
-    case AccessWidth64:
-    case AccessS3SaveWidth64:
-      Width = 8;
-      break;
-    default:
-      Width = 0;
-      IDS_ERROR_TRAP;
-      break;
-  }
-  return Width;
-}
-
-VOID
-CpuidRead (
-  IN        UINT32      CpuidFcnAddress,
-  OUT       CPUID_DATA  *Value
-  )
-{
-  __cpuid ((int *)Value, CpuidFcnAddress);
-}
-
-UINT8
-ReadNumberOfCpuCores(
-  VOID
-  )
-{
-  CPUID_DATA  Value;
-  CpuidRead (0x80000008, &Value);
-  return   Value.ECX_Reg & 0xff;
-}
diff --git a/src/vendorcode/amd/agesa/common/amdlib.h b/src/vendorcode/amd/agesa/common/amdlib.h
deleted file mode 100644
index 5ba39522b2..0000000000
--- a/src/vendorcode/amd/agesa/common/amdlib.h
+++ /dev/null
@@ -1,398 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * AMD Library
- *
- * Contains interface to the AMD AGESA library
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      AGESA
- * @e sub-project:  Lib
- * @e \$Revision: 34897 $   @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
- *
- */
-/*
- *****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***************************************************************************
- *
- */
-
-#ifndef _AMD_LIB_H_
-#define _AMD_LIB_H_
-
-/*----------------------------------------------------------------------------------------
- *                   D E F I N I T I O N S    A N D    M A C R O S
- *----------------------------------------------------------------------------------------
- */
-#define IOCF8 0xCF8
-#define IOCFC 0xCFC
-
-// Reg Values for ReadCpuReg and WriteCpuReg
-#define    CR0_REG  0x00
-#define    CR4_REG  0x04
-#define    DR0_REG  0x10
-#define    DR1_REG  0x11
-#define    DR2_REG  0x12
-#define    DR3_REG  0x13
-#define    DR7_REG  0x17
-
-UINT8
-ReadIo8 (
-  IN       UINT16 Address
-  );
-
-UINT16
-ReadIo16 (
-  IN       UINT16 Address
-  );
-
-UINT32
-ReadIo32 (
-  IN       UINT16 Address
-  );
-
-VOID
-WriteIo8 (
-  IN       UINT16 Address,
-  IN       UINT8 Data
-  );
-
-VOID
-WriteIo16 (
-  IN       UINT16 Address,
-  IN       UINT16 Data
-  );
-
-VOID
-WriteIo32 (
-  IN       UINT16 Address,
-  IN       UINT32 Data
-  );
-
-UINT8
-Read64Mem8 (
-  IN       UINT64 Address
-  );
-
-UINT16
-Read64Mem16 (
-  IN       UINT64 Address
-  );
-
-UINT32
-Read64Mem32 (
-  IN       UINT64 Address
-  );
-
-VOID
-Write64Mem8 (
-  IN       UINT64 Address,
-  IN       UINT8 Data
-  );
-
-VOID
-Write64Mem16 (
-  IN       UINT64 Address,
-  IN       UINT16 Data
-  );
-
-VOID
-Write64Mem32 (
-  IN       UINT64 Address,
-  IN       UINT32 Data
-  );
-
-UINT64
-ReadTSC (
-  VOID
-  );
-
-// MSR
-VOID
-LibAmdMsrRead (
-  IN       UINT32 MsrAddress,
-     OUT   UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMsrWrite (
-  IN       UINT32 MsrAddress,
-  CONST IN       UINT64 *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// IO
-VOID
-LibAmdIoRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdIoWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdIoRMW (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdIoPoll (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT16 IoAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN       UINT64 Delay,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// Memory or MMIO
-VOID
-LibAmdMemRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMemWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMemRMW (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMemPoll (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       UINT64 MemAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN       UINT64 Delay,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// PCI
-VOID
-LibAmdPciRead (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-     OUT   VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciWrite (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciRMW (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciPoll (
-  IN       ACCESS_WIDTH AccessWidth,
-  IN       PCI_ADDR PciAddress,
-  IN       CONST VOID *Data,
-  IN       CONST VOID *DataMask,
-  IN       UINT64 Delay,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciReadBits (
-  IN       PCI_ADDR Address,
-  IN       UINT8 Highbit,
-  IN       UINT8 Lowbit,
-     OUT   UINT32 *Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciWriteBits (
-  IN       PCI_ADDR Address,
-  IN       UINT8 Highbit,
-  IN       UINT8 Lowbit,
-  IN       CONST UINT32 *Value,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdPciFindNextCap (
-  IN OUT   PCI_ADDR *Address,
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// CPUID
-VOID
-LibAmdCpuidRead (
-  IN       UINT32 CpuidFcnAddress,
-     OUT   CPUID_DATA *Value,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-// Utility Functions
-VOID
-LibAmdMemFill (
-  IN       VOID *Destination,
-  IN       UINT8 Value,
-  IN       UINTN FillLength,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-VOID
-LibAmdMemCopy (
-  IN       VOID *Destination,
-  IN       CONST VOID *Source,
-  IN       UINTN CopyLength,
-  IN OUT   AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT32
-LibAmdGetPackageType (
-  IN       AMD_CONFIG_PARAMS *StdHeader
-  );
-
-UINT8
-LibAmdBitScanReverse (
-  IN       UINT32 value
-  );
-UINT8
-LibAmdBitScanForward (
-  IN       UINT32 value
-  );
-
-VOID
-LibAmdReadCpuReg (
-  IN       UINT8 RegNum,
-     OUT   UINT32 *Value
-  );
-VOID
-LibAmdWriteCpuReg (
-  IN       UINT8 RegNum,
-  IN       UINT32 Value
-  );
-
-VOID
-LibAmdWriteBackInvalidateCache (
-  IN       VOID
-  );
-
-VOID
-LibAmdSimNowEnterDebugger (VOID);
-
-VOID
-LibAmdHDTBreakPoint (VOID);
-
-UINT8
-LibAmdAccessWidth (
-  IN       ACCESS_WIDTH AccessWidth
-  );
-
-VOID
-LibAmdCLFlush (
-  IN       UINT64 Address,
-  IN       UINT8  Count
-  );
-
-VOID F10RevDProbeFilterCritical (
-  IN       PCI_ADDR PciAddress,
-  IN       UINT32   PciRegister
-  );
-
-VOID
-LibAmdFinit (
-  VOID
-  );
-
-VOID
-StopHere (
-  VOID
-  );
-
-/* For f14 or older. */
-VOID
-CpuidRead (
-  IN        UINT32      CpuidFcnAddress,
-  OUT       CPUID_DATA  *Value
-  );
-
-UINT8
-ReadNumberOfCpuCores(
-  VOID
-  );
-
-/* From 16kb, no implementation supplied. */
-VOID
-LibAmdFnclex (
-  VOID);
-
-VOID
-LibAmdReadMxcsr (
-     OUT   UINT32 *Value
-  );
-VOID
-LibAmdWriteMxcsr (
-  IN       UINT32 *Value
-  );
-
-
-#endif // _AMD_LIB_H_
diff --git a/src/vendorcode/amd/agesa/common/debug_util.c b/src/vendorcode/amd/agesa/common/debug_util.c
deleted file mode 100644
index 29d0841904..0000000000
--- a/src/vendorcode/amd/agesa/common/debug_util.c
+++ /dev/null
@@ -1,24 +0,0 @@
-
-#include <AGESA.h>
-#include <AMD.h>
-#include <heapManager.h>
-
-#include "debug_util.h"
-
-static const char undefined[] = "undefined";
-
-static const char *HeapStatusStr[] = {
-	"DoNotExistYet", "LocalCache", "TempMem", "SystemMem", "DoNotExistAnymore","S3Resume"
-};
-
-/* This function has to match with enumeration of XXXX defined
- * inside heapManager.h header file.
- */
-const char *heap_status_name(UINT8 HeapStatus)
-{
-	if ((HeapStatus < HEAP_DO_NOT_EXIST_YET) || (HeapStatus > HEAP_S3_RESUME))
-		return undefined;
-
-	int index = HeapStatus - HEAP_DO_NOT_EXIST_YET;
-	return HeapStatusStr[index];
-}
diff --git a/src/vendorcode/amd/agesa/common/debug_util.h b/src/vendorcode/amd/agesa/common/debug_util.h
deleted file mode 100644
index a8d9a33c50..0000000000
--- a/src/vendorcode/amd/agesa/common/debug_util.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef __AGESA_DEBUG_UTIL_H__
-#define __AGESA_DEBUG_UTIL_H__
-
-#include "AMD.h"
-
-const char *heap_status_name(UINT8 HeapStatus);
-
-#endif