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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-02 16:41:43 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-26 10:05:48 +0000 |
commit | 63fac81fc80d701a785ed61a3b5738ea0a821169 (patch) | |
tree | 7b50798c95fc1e3ec309351157197784e04131f8 /src/vendorcode/amd/pi/Makefile.inc | |
parent | 8bf978c2aa92aa194d74e6588344f579de5828de (diff) |
AGESA: Implement POSTCAR_STAGE
Move all boards that have moved away from AGESA_LEGACY_WRAPPER
or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE.
We use POSTCAR_STAGE as a conditional in CAR teardown to tell
our MTRR setup is prepared such that invalidation without
writeback is a valid operation.
Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/pi/Makefile.inc')
-rw-r--r-- | src/vendorcode/amd/pi/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index bcf078deee..0192faad4a 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -85,7 +85,9 @@ export AGESA_CFLAGS := $(AGESA_CFLAGS) CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_postcar:= $(CC_postcar) -I$(AGESA_ROOT)/binaryPI CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) + CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS) CC_x86_64 := $(CC_x86_64) $(AGESA_INC) $(AGESA_CFLAGS) |