vendorcode/amd/pi/00670f00: Update headers to AGESA 1.3.0.9

Update the shared AGESA headers to 1.3.0.9.

This depends on 3rdparty/blobs/pi/amd/00670F00/ binaries updated
to the same version.

BUG=b:72679320
TEST=build and boot Grunt

Change-Id: I783b7318e8273913f753b70f12bfe8b71274e27f
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/23547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

6 files changed, 35 insertions, 33 deletions

diff --git a/src/vendorcode/amd/pi/00670F00/Proc/CPU/Table.h b/src/vendorcode/amd/pi/00670F00/Proc/CPU/Table.h
index 75169cb62e..1d53990b7d 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/CPU/Table.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/CPU/Table.h
@@ -14,7 +14,7 @@
  */
  /*****************************************************************************
  *
- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.
+ * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -656,7 +656,7 @@ typedef struct {
  */
 typedef struct {
   REGISTER_TABLE_TIME_POINT TimePoint;               ///< Time point
-  CONST REGISTER_TABLE**    TableList;               ///< The table list.
+  CONST REGISTER_TABLE* CONST * CONST TableList;     ///< The table list.
 } REGISTER_TABLE_AT_GIVEN_TP;
 /*------------------------------------------------------------------------------------------*/
 /*
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuFamilyTranslation.h b/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuFamilyTranslation.h
index f4ffd49efe..9331cd1266 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuFamilyTranslation.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuFamilyTranslation.h
@@ -13,7 +13,7 @@
  */
  /*****************************************************************************
  *
- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.
+ * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -164,7 +164,7 @@ AGESA_FORWARD_DECLARATION (CPU_SPECIFIC_SERVICES);
  *
  */
 typedef AGESA_STATUS F_CPU_DISABLE_PSTATE (
-  IN       CPU_SPECIFIC_SERVICES *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES *FamilySpecificServices,
   IN       UINT8 StateNumber,
   IN       AMD_CONFIG_PARAMS *StdHeader
   );
@@ -185,7 +185,7 @@ typedef F_CPU_DISABLE_PSTATE *PF_CPU_DISABLE_PSTATE;
  *
  */
 typedef AGESA_STATUS F_CPU_TRANSITION_PSTATE (
-  IN       CPU_SPECIFIC_SERVICES *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES *FamilySpecificServices,
   IN       UINT8 StateNumber,
   IN       BOOLEAN WaitForChange,
   IN       AMD_CONFIG_PARAMS *StdHeader
@@ -210,7 +210,7 @@ typedef F_CPU_TRANSITION_PSTATE *PF_CPU_TRANSITION_PSTATE;
  *
  */
 typedef BOOLEAN F_CPU_GET_IDD_MAX (
-  IN       CPU_SPECIFIC_SERVICES *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES *FamilySpecificServices,
   IN       UINT8 StateNumber,
      OUT   UINT32 *ProcIddMax,
   IN       AMD_CONFIG_PARAMS *StdHeader
@@ -231,7 +231,7 @@ typedef F_CPU_GET_IDD_MAX *PF_CPU_GET_IDD_MAX;
  *
  */
 typedef AGESA_STATUS F_CPU_GET_TSC_RATE (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  * FamilySpecificServices,
      OUT   UINT32 *FreqInMHz,
   IN       AMD_CONFIG_PARAMS *StdHeader
   );
@@ -252,7 +252,7 @@ typedef F_CPU_GET_TSC_RATE *PF_CPU_GET_TSC_RATE;
  *  @retval        AGESA_SUCCESS           FreqInMHz is valid.
  */
 typedef AGESA_STATUS F_CPU_GET_NB_FREQ (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
      OUT   UINT32 *FreqInMHz,
   IN       AMD_CONFIG_PARAMS *StdHeader
   );
@@ -276,7 +276,7 @@ typedef F_CPU_GET_NB_FREQ *PF_CPU_GET_NB_FREQ;
  *  @retval        AGESA_STATUS            Northbridge frequency is valid
  */
 typedef AGESA_STATUS F_CPU_GET_MIN_MAX_NB_FREQ (
-  IN       CPU_SPECIFIC_SERVICES *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES *FamilySpecificServices,
   IN       PLATFORM_CONFIGURATION *PlatformConfig,
   IN       PCI_ADDR *PciAddress,
      OUT   UINT32 *MinFreqInMHz,
@@ -306,7 +306,7 @@ typedef F_CPU_GET_MIN_MAX_NB_FREQ *PF_CPU_GET_MIN_MAX_NB_FREQ;
  *  @retval        FALSE                   NbPstate is disabled or invalid
  */
 typedef BOOLEAN F_CPU_GET_NB_PSTATE_INFO (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       PLATFORM_CONFIGURATION *PlatformConfig,
   IN       PCI_ADDR *PciAddress,
   IN       UINT32 NbPstate,
@@ -333,7 +333,7 @@ typedef F_CPU_GET_NB_PSTATE_INFO *PF_CPU_GET_NB_PSTATE_INFO;
  *
  */
 typedef BOOLEAN F_CPU_IS_NBCOF_INIT_NEEDED (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       PCI_ADDR *PciAddress,
      OUT   BOOLEAN *NbVidUpdateAll,
   IN       AMD_CONFIG_PARAMS *StdHeader
@@ -358,7 +358,7 @@ typedef F_CPU_IS_NBCOF_INIT_NEEDED *PF_CPU_IS_NBCOF_INIT_NEEDED;
  *
  */
 typedef BOOLEAN F_CPU_GET_NB_IDD_MAX (
-  IN       CPU_SPECIFIC_SERVICES *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES *FamilySpecificServices,
   IN       UINT8 StateNumber,
      OUT   UINT32 *NbIddMax,
   IN       AMD_CONFIG_PARAMS *StdHeader
@@ -381,7 +381,7 @@ typedef F_CPU_GET_NB_IDD_MAX *PF_CPU_GET_NB_IDD_MAX;
  *  @retval        FALSE                   The core was previously launched, or has a problem.
  */
 typedef BOOLEAN F_CPU_AP_INITIAL_LAUNCH (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       UINT32 CoreNumber,
   IN       AMD_CONFIG_PARAMS *StdHeader
   );
@@ -401,7 +401,7 @@ typedef F_CPU_AP_INITIAL_LAUNCH *PF_CPU_AP_INITIAL_LAUNCH;
  *  @return        One-based number of physical cores on current processor
  */
 typedef UINT8 F_CPU_NUMBER_OF_PHYSICAL_CORES (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       AMD_CONFIG_PARAMS *StdHeader
   );
 
@@ -420,7 +420,7 @@ typedef F_CPU_NUMBER_OF_PHYSICAL_CORES *PF_CPU_NUMBER_OF_PHYSICAL_CORES;
  *  @return        The AP's unique core number
  */
 typedef UINT32 (F_CPU_GET_AP_CORE_NUMBER) (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       AMD_CONFIG_PARAMS      *StdHeader
   );
 
@@ -449,7 +449,7 @@ typedef enum {
  * @retval        CoreIdPositionOne       Core Id is low
  */
 typedef CORE_ID_POSITION F_CORE_ID_POSITION_IN_INITIAL_APIC_ID (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       AMD_CONFIG_PARAMS      *StdHeader
   );
 
@@ -468,7 +468,7 @@ typedef F_CORE_ID_POSITION_IN_INITIAL_APIC_ID *PF_CORE_ID_POSITION_IN_INITIAL_AP
  *
  */
 typedef VOID (F_CPU_SET_WARM_RESET_FLAG) (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       AMD_CONFIG_PARAMS *StdHeader,
   IN       WARM_RESET_REQUEST *Request
   );
@@ -488,7 +488,7 @@ typedef F_CPU_SET_WARM_RESET_FLAG *PF_CPU_SET_WARM_RESET_FLAG;
  *
  */
 typedef VOID (F_CPU_GET_WARM_RESET_FLAG) (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       AMD_CONFIG_PARAMS *StdHeader,
      OUT   WARM_RESET_REQUEST *Request
   );
@@ -509,7 +509,7 @@ typedef F_CPU_GET_WARM_RESET_FLAG *PF_CPU_GET_WARM_RESET_FLAG;
  *
  */
 typedef VOID F_CPU_GET_FAMILY_SPECIFIC_ARRAY (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
      OUT   CONST VOID **FamilySpecificArray,
      OUT   UINT8 *NumberOfElements,
   IN       AMD_CONFIG_PARAMS *StdHeader
@@ -530,7 +530,7 @@ typedef F_CPU_GET_FAMILY_SPECIFIC_ARRAY *PF_CPU_GET_FAMILY_SPECIFIC_ARRAY;
  *
  */
 typedef AGESA_STATUS F_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN OUT   PLATFORM_FEATS         *FeaturesUnion,
   IN       AMD_CONFIG_PARAMS      *StdHeader
   );
@@ -552,7 +552,7 @@ typedef F_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO *PF_CPU_GET_PLATFORM_TYPE_SPECIFIC
  * @retval         FALSE                          The NB PState feature is not enabled.
  */
 typedef BOOLEAN F_IS_NB_PSTATE_ENABLED (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
   IN       PLATFORM_CONFIGURATION *PlatformConfig,
   IN       AMD_CONFIG_PARAMS      *StdHeader
   );
@@ -571,7 +571,7 @@ typedef F_IS_NB_PSTATE_ENABLED *PF_IS_NB_PSTATE_ENABLED;
  *
  */
 typedef REGISTER_TABLE_AT_GIVEN_TP *F_GET_REGISTER_TABLE_LIST (
-  IN       CPU_SPECIFIC_SERVICES                *FamilyServices,
+  IN       CONST CPU_SPECIFIC_SERVICES          *FamilyServices,
   IN       AMD_CONFIG_PARAMS                    *StdHeader
   );
 /// Reference to a Method.
@@ -590,7 +590,7 @@ typedef F_GET_REGISTER_TABLE_LIST *PF_GET_REGISTER_TABLE_LIST;
  *
  */
 typedef F_FAM_SPECIFIC_WORKAROUND **F_GET_WORKAROUND_TABLE (
-  IN       CPU_SPECIFIC_SERVICES                *FamilyServices,
+  IN       CONST CPU_SPECIFIC_SERVICES                *FamilyServices,
      OUT   UINT16                               *NumberOfWorkaroundTableEntries,
   IN       AMD_CONFIG_PARAMS                    *StdHeader
   );
@@ -614,7 +614,7 @@ typedef enum {
  *
  */
 typedef VOID F_PERFORM_EARLY_INIT_ON_CORE (
-  IN       CPU_SPECIFIC_SERVICES  *FamilyServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilyServices,
   IN       AMD_CPU_EARLY_PARAMS   *EarlyParams,
   IN       AMD_CONFIG_PARAMS      *StdHeader
   );
@@ -644,7 +644,7 @@ typedef struct _S_PERFORM_EARLY_INIT_ON_CORE {
  *
  */
 typedef VOID F_GET_EARLY_INIT_TABLE (
-  IN       CPU_SPECIFIC_SERVICES                *FamilyServices,
+  IN       CONST CPU_SPECIFIC_SERVICES                *FamilyServices,
      OUT   CONST S_PERFORM_EARLY_INIT_ON_CORE   **Table,
   IN       AMD_CPU_EARLY_PARAMS                 *EarlyParams,
   IN       AMD_CONFIG_PARAMS                    *StdHeader
@@ -853,7 +853,7 @@ GetFeatureServicesFromLogicalId (
  */
 VOID
 GetEmptyArray (
-  IN       CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
+  IN       CONST CPU_SPECIFIC_SERVICES  *FamilySpecificServices,
      OUT   CONST VOID **Empty,
      OUT   UINT8 *NumberOfElements,
   IN       AMD_CONFIG_PARAMS *StdHeader
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuRegisters.h
index 4d10b42a6c..46906a8783 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuRegisters.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/CPU/cpuRegisters.h
@@ -14,7 +14,7 @@
  */
  /*****************************************************************************
  *
- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.
+ * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -236,7 +236,7 @@ typedef struct {
 /// Logical CPU ID Table
 typedef struct {
   IN       UINT32  Elements;                    ///< Number of Elements
-  IN       CPU_LOGICAL_ID_XLAT *LogicalIdTable; ///< CPU Logical ID Transfer table Pointer
+  IN       CONST CPU_LOGICAL_ID_XLAT *LogicalIdTable; ///< CPU Logical ID Transfer table Pointer
 } LOGICAL_ID_TABLE;
 
 // MSRs
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h
index 46e5b172bf..21f73a3a66 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h
@@ -14,7 +14,7 @@
  */
  /*****************************************************************************
  *
- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.
+ * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -937,6 +937,7 @@ typedef struct {
   UINT32                FchCpuId;                       ///< Saving CpuId for FCH Module.
   BOOLEAN               NoneSioKbcSupport;              ///< NoneSioKbcSupport - No KBC/SIO controller ( Turn on Inchip KBC emulation function )
   FCH_CS                FchCsSupport;                   ///< FCH Cs function structure
+  BOOLEAN               FchAllowSpiInterfaceUpdate;     ///< FchAllowSpiInterfaceUpdate - Fch Allow Spi Interface Update
 } FCH_MISC;
 
 
@@ -1405,7 +1406,7 @@ UINT8		  USB30Gen1PreEmLe;			///< PTUSB30PCS_B3 genI pre-emphasis level
 ///PTUSBTxStructure
 typedef struct {
 PT_USB31Tx    USB31Tx[2];                   ///< USB31Tx setting
-PT_USB30Tx    USB30Tx[3];                   ///< USB30Tx setting
+PT_USB30Tx    USB30Tx[6];                   ///< USB30Tx setting
 UINT8		  USB20B2Tx00;			        ///< USB2.0 TX driving current, 7: largest By USB_HSDP/N[0]
 UINT8		  USB20B2Tx05;			        ///< USB2.0 TX driving current, 7: largest By USB_HSDP/N[5]
 UINT8		  USB20B3Tx1113;			    ///< USB2.0 TX driving current, 7: largest By USB_HSDP/N[13][11]
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
index 45453a80e6..c80dc526f4 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
@@ -14,7 +14,7 @@
  */
  /*****************************************************************************
  *
- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.
+ * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -81,6 +81,7 @@ BOOLEAN       FchCheckST (IN AMD_CONFIG_PARAMS *StdHeader);
 BOOLEAN       FchCheckCZ (IN AMD_CONFIG_PARAMS *StdHeader);
 BOOLEAN       FchCheckPackageAM4 (IN AMD_CONFIG_PARAMS *StdHeader);
 UINT64        FchGetScratchFuse (IN AMD_CONFIG_PARAMS *StdHeader);
+VOID          FchInitResetRequest (IN AMD_CONFIG_PARAMS *StdHeader);
 
 ///
 /// Fch Ab Routines
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h
index 304ed23fcc..04784fe3fa 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h
@@ -14,7 +14,7 @@
  */
  /*****************************************************************************
  *
- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.
+ * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -115,6 +115,6 @@
 #include "FchBiosRamUsage.h"
 #include "AmdFch.h"
 
-extern BUILD_OPT_CFG    UserOptions;
+extern CONST BUILD_OPT_CFG    UserOptions;
 
 #endif // _FCH_PLATFORM_H_