diff options
| author | Marc Jones <marcj303@gmail.com> | 2018-01-25 17:05:46 -0700 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2018-02-01 18:42:58 +0000 |
| commit | 823dbde2abb116575ce183f73cce332a4d5a9c8e (patch) | |
| tree | 07d8028b2ce660940cb5aaad61f9f363e09c4a28 /src/vendorcode/amd/pi/00670F00/Proc/Fch/Common | |
| parent | 0876caa4736fe97bf6586d19ab9c3e2ea29408f7 (diff) | |
vendorcode/amd/pi/00670f00: Update headers to AGESA 1.3.0.9
Update the shared AGESA headers to 1.3.0.9.
This depends on 3rdparty/blobs/pi/amd/00670F00/ binaries updated
to the same version.
BUG=b:72679320
TEST=build and boot Grunt
Change-Id: I783b7318e8273913f753b70f12bfe8b71274e27f
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/23547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/pi/00670F00/Proc/Fch/Common')
| -rw-r--r-- | src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h | 5 | ||||
| -rw-r--r-- | src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h | 3 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h index 46e5b172bf..21f73a3a66 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h @@ -14,7 +14,7 @@ */ /***************************************************************************** * - * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc. + * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -937,6 +937,7 @@ typedef struct { UINT32 FchCpuId; ///< Saving CpuId for FCH Module. BOOLEAN NoneSioKbcSupport; ///< NoneSioKbcSupport - No KBC/SIO controller ( Turn on Inchip KBC emulation function ) FCH_CS FchCsSupport; ///< FCH Cs function structure + BOOLEAN FchAllowSpiInterfaceUpdate; ///< FchAllowSpiInterfaceUpdate - Fch Allow Spi Interface Update } FCH_MISC; @@ -1405,7 +1406,7 @@ UINT8 USB30Gen1PreEmLe; ///< PTUSB30PCS_B3 genI pre-emphasis level ///PTUSBTxStructure typedef struct { PT_USB31Tx USB31Tx[2]; ///< USB31Tx setting -PT_USB30Tx USB30Tx[3]; ///< USB30Tx setting +PT_USB30Tx USB30Tx[6]; ///< USB30Tx setting UINT8 USB20B2Tx00; ///< USB2.0 TX driving current, 7: largest By USB_HSDP/N[0] UINT8 USB20B2Tx05; ///< USB2.0 TX driving current, 7: largest By USB_HSDP/N[5] UINT8 USB20B3Tx1113; ///< USB2.0 TX driving current, 7: largest By USB_HSDP/N[13][11] diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h index 45453a80e6..c80dc526f4 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h @@ -14,7 +14,7 @@ */ /***************************************************************************** * - * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc. + * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -81,6 +81,7 @@ BOOLEAN FchCheckST (IN AMD_CONFIG_PARAMS *StdHeader); BOOLEAN FchCheckCZ (IN AMD_CONFIG_PARAMS *StdHeader); BOOLEAN FchCheckPackageAM4 (IN AMD_CONFIG_PARAMS *StdHeader); UINT64 FchGetScratchFuse (IN AMD_CONFIG_PARAMS *StdHeader); +VOID FchInitResetRequest (IN AMD_CONFIG_PARAMS *StdHeader); /// /// Fch Ab Routines |