diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-07-26 14:28:19 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-07-31 00:46:25 +0000 |
| commit | d30201feaffc9448a18aaf07e51ae388a6dda915 (patch) | |
| tree | 0616034ca49fc5e3f5eb4a7619baf3b472d2da22 /src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h | |
| parent | 7108107fa2b205ec1cd042923815c6c5342e7ae9 (diff) | |
src/vendorcode/amd/pi/00670F00: Remove IMC support
Per AMD, the Integrated Micro Controller is not a supported feature of the
Stoney Ridge APU. Systems are expected to implement an external EC for
desired features. Remove all stoney IMC files and functions from vendor code.
BUG=b:111780177
TEST=Build grunt and gardenia
Change-Id: I06e993fa498cc0978c1d037bc6001682407f7fac
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/27652
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h')
| -rw-r--r-- | src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h index c80dc526f4..00247f4075 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h @@ -62,7 +62,6 @@ VOID ProgramFchSciMapTbl (IN SCI_MAP_CONTROL *pSciMapTbl, IN FCH_RESET VOID ProgramFchGpioTbl (IN GPIO_CONTROL *pGpioTbl); VOID ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock); VOID GetChipSysMode (IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); -BOOLEAN IsImcEnabled (IN AMD_CONFIG_PARAMS *StdHeader); VOID ReadPmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID WritePmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID RwPmio (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader); @@ -183,18 +182,14 @@ VOID FchECfancontrolservice (IN VOID* FchDataPtr); /// -/// Fch Imc Routines +/// Fch EC Routines /// /// Pei Phase /// -VOID FchInitResetImc (IN VOID *FchDataPtr); VOID FchInitResetEc (IN VOID *FchDataPtr); /// /// Dxe Phase /// -VOID FchInitEnvImc (IN VOID *FchDataPtr); -VOID FchInitMidImc (IN VOID *FchDataPtr); -VOID FchInitLateImc (IN VOID *FchDataPtr); VOID FchInitEnvEc (IN VOID *FchDataPtr); VOID FchInitMidEc (IN VOID *FchDataPtr); VOID FchInitLateEc (IN VOID *FchDataPtr); @@ -210,17 +205,6 @@ VOID WriteECmsg (IN UINT8 Address, IN UINT8 OpFlag, IN VOID* Value, IN AMD_CO VOID ReadECmsg (IN UINT8 Address, IN UINT8 OpFlag, OUT VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID WaitForEcLDN9MailboxCmdAck (IN AMD_CONFIG_PARAMS *StdHeader); -VOID ImcSleep (IN VOID *FchDataPtr); -VOID ImcDisarmSurebootTimer (IN VOID *FchDataPtr); -VOID ImcDisableSurebootTimer (IN VOID *FchDataPtr); -VOID ImcWakeup (IN VOID *FchDataPtr); -VOID ImcIdle (IN VOID *FchDataPtr); -BOOLEAN ValidateImcFirmware (IN VOID *FchDataPtr); -VOID SoftwareToggleImcStrapping (IN VOID *FchDataPtr); -VOID ImcCrashReset (IN VOID *FchDataPtr); -VOID SoftwareDisableImc (IN VOID *FchDataPtr); - - /// /// Fch Ir Routines /// @@ -428,6 +412,4 @@ RetrieveDataBlockFromInitReset ( IN FCH_DATA_BLOCK *FchParams ); - #endif - |