vendorcode: Move AMD sources from blobs to vendorcode

The AMD AGESA binaryPI sources were incorrectly committed to
3rdparty/blobs. Move them from blobs to vendorcode and fix
Kconfig and Makefile.inc to match.

Change-Id: I55a777553c1203464d7f7f4293b361fedcfa3283
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/10982
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 144 insertions, 0 deletions

diff --git a/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/MemLib.c b/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/MemLib.c
new file mode 100644
index 0000000000..656f7689bb
--- /dev/null
+++ b/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/MemLib.c
@@ -0,0 +1,144 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * FCH memory access lib
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: FCH
+ * @e \$Revision: 309090 $   @e \$Date: 2014-12-09 12:28:05 -0600 (Tue, 09 Dec 2014) $
+ *
+ */
+ /*****************************************************************************
+ *
+ * Copyright (c) 2008 - 2015, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************/
+#include "FchPlatform.h"
+#include "Ids.h"
+#define FILECODE PROC_FCH_COMMON_MEMLIB_FILECODE
+
+
+/**
+ * ReadMem - Read FCH BAR Memory
+ *
+ * @param[in] Address    - Memory BAR address
+ * @param[in] OpFlag     - Access width
+ * @param[in] *ValuePtr  - In/Out value pointer
+ *
+ */
+VOID
+ReadMem (
+  IN  UINT32     Address,
+  IN  UINT8      OpFlag,
+  IN  VOID       *ValuePtr
+  )
+{
+  OpFlag = OpFlag & 0x7f;
+
+  switch ( OpFlag ) {
+  case AccessWidth8:
+    *((UINT8*)ValuePtr) = *((volatile UINT8*) ((UINTN)Address));
+    break;
+
+  case AccessWidth16:
+    *((UINT16*)ValuePtr) = *((volatile UINT16*) ((UINTN)Address));
+    break;
+
+  case AccessWidth32:
+    *((UINT32*)ValuePtr) = *((volatile UINT32*) ((UINTN)Address));
+    break;
+
+  default:
+    ASSERT (FALSE);
+    break;
+  }
+}
+
+/**
+ * WriteMem - Write FCH BAR Memory
+ *
+ * @param[in] Address    - Memory BAR address
+ * @param[in] OpFlag     - Access width
+ * @param[in] *ValuePtr  - In/Out Value pointer
+ *
+ */
+VOID
+WriteMem (
+  IN  UINT32     Address,
+  IN  UINT8      OpFlag,
+  IN  VOID       *ValuePtr
+  )
+{
+  OpFlag = OpFlag & 0x7f;
+
+  switch ( OpFlag ) {
+  case AccessWidth8 :
+    *((volatile UINT8*) ((UINTN)Address)) = *((UINT8*)ValuePtr);
+    break;
+
+  case AccessWidth16:
+    *((volatile UINT16*) ((UINTN)Address)) = *((UINT16*)ValuePtr);
+    break;
+
+  case AccessWidth32:
+    *((volatile UINT32*) ((UINTN)Address)) = *((UINT32*)ValuePtr);
+    break;
+
+  default:
+    ASSERT (FALSE);
+    break;
+  }
+}
+
+/**
+ * RwMem - Read & Write FCH BAR Memory
+ *
+ * @param[in] Address    - Memory BAR address
+ * @param[in] OpFlag     - Access width
+ * @param[in] Mask       - Mask Value of data
+ * @param[in] Data       - Write data
+ *
+ */
+VOID
+RwMem (
+  IN  UINT32     Address,
+  IN  UINT8      OpFlag,
+  IN  UINT32     Mask,
+  IN  UINT32     Data
+  )
+{
+  UINT32 Result;
+
+  ReadMem (Address, OpFlag, &Result);
+  Result = (Result & Mask) | Data;
+  WriteMem (Address, OpFlag, &Result);
+  ReadMem (Address, OpFlag, &Result);
+}
+