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authorMarshall Dawson <marshalldawson3rd@gmail.com>2019-07-18 13:09:05 -0600
committerMartin Roth <martinroth@google.com>2019-10-20 17:48:40 +0000
commit31ef56958db004dd6c0851d8a951721819ee2431 (patch)
treeffe2ccc81834f6f4e9d2c22b31f51df1a69e114b /src/vendorcode/amd/fsp/picasso/FspsUpd.h
parentc888a7bbaa5661abc6f44c0f6e4ba859966aebb3 (diff)
vc/amd/fsp: Add UPD header files for picasso
Add files for Picasso's FSP UPD definitions. These are automatically generated from the FSP build. Change-Id: I7f683a9332fa4be5f78819c7d9b9bafb2d8cbe34 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34575 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/fsp/picasso/FspsUpd.h')
-rw-r--r--src/vendorcode/amd/fsp/picasso/FspsUpd.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/vendorcode/amd/fsp/picasso/FspsUpd.h b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
new file mode 100644
index 0000000000..5a154358d9
--- /dev/null
+++ b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
@@ -0,0 +1,44 @@
+/** @file
+ *
+ * This file is automatically generated.
+ *
+ */
+
+#ifndef __FSPSUPD_H__
+#define __FSPSUPD_H__
+
+#include <FspUpd.h>
+
+#pragma pack(1)
+
+
+typedef struct {
+ /** Offset 0x0020**/ uint32_t pcie_port0_topology;
+ /** Offset 0x0024**/ uint32_t pcie_port1_topology;
+ /** Offset 0x0028**/ uint32_t pcie_port2_topology;
+ /** Offset 0x002C**/ uint32_t pcie_port3_topology;
+ /** Offset 0x0030**/ uint32_t pcie_port4_topology;
+ /** Offset 0x0034**/ uint32_t pcie_port5_topology;
+ /** Offset 0x0038**/ uint32_t pcie_port6_topology;
+ /** Offset 0x003C**/ uint32_t pcie_sata_topology;
+ /** Offset 0x0040**/ uint32_t pcie_xgbe1_topology;
+ /** Offset 0x0044**/ uint32_t pcie_xgbe2_topology;
+ /** Offset 0x0048**/ uint32_t dp0_connector_type;
+ /** Offset 0x004C**/ uint32_t dp1_connector_type;
+ /** Offset 0x0050**/ uint32_t dp2_connector_type;
+ /** Offset 0x0054**/ uint32_t dp3_connector_type;
+ /** Offset 0x0058**/ uint32_t emmc0_mode;
+ /** Offset 0x005C**/ uint8_t UnusedUpdSpace0[196];
+ /** Offset 0x0120**/ uint16_t UpdTerminator;
+} FSP_S_CONFIG;
+
+/** Fsp S UPD Configuration
+**/
+typedef struct {
+ /** Offset 0x0000**/ FSP_UPD_HEADER FspUpdHeader;
+ /** Offset 0x0020**/ FSP_S_CONFIG FspsConfig;
+} FSPS_UPD;
+
+#pragma pack()
+
+#endif