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authorefdesign98 <efdesign98@gmail.com>2011-06-16 16:39:30 -0700
committerMarc Jones <marcj303@gmail.com>2011-06-21 22:38:39 +0200
commitee39ea7e7edf9699f1bae1b2708ad6816f054817 (patch)
treee2de6cd600b1b8d4a657202962d8bc2e348ec67f /src/vendorcode/amd/cimx/sb900/PciLib.c
parentb0969d65e675f7c7a3004fc3f6fc154f22e73d44 (diff)
Add AMD SB900 CIMx code
This code is added to support the AMD SB900 southbridge. Change-Id: I7dc5e13a53ffd479dcea4e05e8c8631096e2ba91 Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Reviewed-on: http://review.coreboot.org/41 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/cimx/sb900/PciLib.c')
-rwxr-xr-xsrc/vendorcode/amd/cimx/sb900/PciLib.c83
1 files changed, 83 insertions, 0 deletions
diff --git a/src/vendorcode/amd/cimx/sb900/PciLib.c b/src/vendorcode/amd/cimx/sb900/PciLib.c
new file mode 100755
index 0000000000..cba6701b80
--- /dev/null
+++ b/src/vendorcode/amd/cimx/sb900/PciLib.c
@@ -0,0 +1,83 @@
+/*;********************************************************************************
+;
+; Copyright (c) 2011, Advanced Micro Devices, Inc.
+; All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+; * Redistributions of source code must retain the above copyright
+; notice, this list of conditions and the following disclaimer.
+; * Redistributions in binary form must reproduce the above copyright
+; notice, this list of conditions and the following disclaimer in the
+; documentation and/or other materials provided with the distribution.
+; * Neither the name of Advanced Micro Devices, Inc. nor the names of
+; its contributors may be used to endorse or promote products derived
+; from this software without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+; DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;*********************************************************************************/
+
+
+#include "SbPlatform.h"
+#include "cbtypes.h"
+
+VOID
+ReadPCI (
+ IN UINT32 Address,
+ IN UINT8 OpFlag,
+ IN VOID* Value
+ )
+{
+ OpFlag = OpFlag & 0x7f;
+
+ if ( (UINT16)Address < 0xff ) {
+ //Normal Config Access
+ UINT32 AddrCf8;
+ AddrCf8 = (1 << 31) + ((Address >> 8) & 0x0FFFF00) + (Address & 0xFC);
+ WriteIO (0xCf8, AccWidthUint32, &AddrCf8);
+ ReadIO ((UINT16) (0xCfC + (Address & 0x3)), OpFlag, Value);
+ }
+}
+
+VOID
+WritePCI (
+ IN UINT32 Address,
+ IN UINT8 OpFlag,
+ IN VOID* Value
+ )
+{
+ OpFlag = OpFlag & 0x7f;
+ if ( (UINT16)Address < 0xff ) {
+ //Normal Config Access
+ UINT32 AddrCf8;
+ AddrCf8 = (1 << 31) + ((Address >> 8)&0x0FFFF00) + (Address & 0xFC);
+ WriteIO (0xCf8, AccWidthUint32, &AddrCf8);
+ WriteIO ((UINT16) (0xCfC + (Address & 0x3)), OpFlag, Value);
+ }
+}
+
+VOID
+RWPCI (
+ IN UINT32 Address,
+ IN UINT8 OpFlag,
+ IN UINT32 Mask,
+ IN UINT32 Data
+ )
+{
+ UINT32 Result;
+ Result = 0;
+ OpFlag = OpFlag & 0x7f;
+ ReadPCI (Address, OpFlag, &Result);
+ Result = (Result & Mask) | Data;
+ WritePCI (Address, OpFlag, &Result);
+}