Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8.

This code currently generates many warnings that are functionally benign.  These are being addressed, but the wheels of bureaucracy turn slowly.  This drop supports AMD cpu families 10h and 14h.  Only Family 14h is used as an example in this set of patches.  Other cpu families are supported by the infrastructure, but their specific support is not included herein.  This patch is functionally independent of the other patches in this set.

Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 84 insertions, 0 deletions

diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc
new file mode 100644
index 0000000000..c9bfea9c75
--- /dev/null
+++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc
@@ -0,0 +1,84 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2011 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+#
+
+# CIMX Root directory
+CIMX_ROOT = $(src)/vendorcode/amd/cimx
+
+CIMX_INC  = -I$(src)/mainboard/$(MAINBOARDDIR)
+CIMX_INC  += -I$(src)/southbridge/amd/cimx_wrapper/sb800
+CIMX_INC  += -I$(CIMX_ROOT)/sb800
+
+romstage-y += ACPILIB.c
+romstage-y += AZALIA.c
+romstage-y += DISPATCHER.c
+romstage-y += ECfanc.c
+romstage-y += ECfanLIB.c
+romstage-y += GEC.c
+romstage-y += Gpp.c
+romstage-y += PMIO2LIB.c
+romstage-y += SATA.c
+romstage-y += SBCMN.c
+romstage-y += SBMAIN.c
+romstage-y += SBPOR.c
+romstage-y += MEMLIB.c
+romstage-y += PCILIB.c
+romstage-y += IOLIB.c
+romstage-y += PMIOLIB.c
+romstage-y += AMDLIB.c
+romstage-y += SBPELIB.c
+romstage-y += AMDSBLIB.c
+romstage-y += ECLIB.c
+romstage-y += EC.c
+romstage-y += SMM.c
+romstage-y += USB.c
+
+ramstage-y += ACPILIB.c
+ramstage-y += AZALIA.c
+ramstage-y += DISPATCHER.c
+ramstage-y += ECfanc.c
+ramstage-y += ECfanLIB.c
+ramstage-y += GEC.c
+ramstage-y += Gpp.c
+ramstage-y += PMIO2LIB.c
+ramstage-y += SATA.c
+ramstage-y += SBCMN.c
+ramstage-y += SBMAIN.c
+ramstage-y += SBPOR.c
+ramstage-y += MEMLIB.c
+ramstage-y += PCILIB.c
+ramstage-y += IOLIB.c
+ramstage-y += PMIOLIB.c
+ramstage-y += AMDLIB.c
+ramstage-y += SBPELIB.c
+ramstage-y += AMDSBLIB.c
+ramstage-y += ECLIB.c
+ramstage-y += EC.c
+ramstage-y += SMM.c
+ramstage-y += USB.c
+#ramstage-y += LEGACY.c
+#ramstage-y += SbModInf.c
+
+CIMX_CFLAGS =
+export CIMX_ROOT
+export CIMX_INC
+export CIMX_CFLAGS
+CC := $(CC) $(CIMX_INC)
+
+#######################################################################
+