diff options
| author | Kerry She <Kerry.she@amd.com> | 2011-01-01 17:44:07 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2011-01-01 17:44:07 +0000 |
| commit | 799fed98ea57fc9632b7bf95b3f1d79519cbdd15 (patch) | |
| tree | 94d053f98639980e357b9fba1b404bec153e052c /src/vendorcode/amd/cimx/sb800/ECLIB.c | |
| parent | 123edb0f688f2c6b7146929d6650751f6674a95c (diff) | |
Add AMD SB800 southbridge CIMx code.
The main CIMx code is in a src/vendorcode directory and should not be
changed with regard to coding style etc. in order to remain easily syncable
with the "upstream" AMD code.
Signed-off-by: Kerry She <Kerry.she@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6229 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/vendorcode/amd/cimx/sb800/ECLIB.c')
| -rw-r--r-- | src/vendorcode/amd/cimx/sb800/ECLIB.c | 146 |
1 files changed, 146 insertions, 0 deletions
diff --git a/src/vendorcode/amd/cimx/sb800/ECLIB.c b/src/vendorcode/amd/cimx/sb800/ECLIB.c new file mode 100644 index 0000000000..e8ee956810 --- /dev/null +++ b/src/vendorcode/amd/cimx/sb800/ECLIB.c @@ -0,0 +1,146 @@ +/**
+ * @file
+ *
+ * Southbridge EC IO access common routine
+ *
+ */
+/*
+ *****************************************************************************
+ *
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * ***************************************************************************
+ *
+ */
+
+#include "SBPLATFORM.h"
+
+// #ifndef NO_EC_SUPPORT
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * EnterEcConfig - Force EC into Config mode
+ *
+ *
+ *
+ *
+ */
+VOID
+EnterEcConfig (
+ )
+{
+ UINT16 dwEcIndexPort;
+
+ ReadPCI ((LPC_BUS_DEV_FUN << 16) + SB_LPC_REGA4, AccWidthUint16 | S3_SAVE, &dwEcIndexPort);
+ dwEcIndexPort &= ~(BIT0);
+ RWIO (dwEcIndexPort, AccWidthUint8, 0x00, 0x5A);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * ExitEcConfig - Force EC exit Config mode
+ *
+ *
+ *
+ *
+ */
+VOID
+ExitEcConfig (
+ )
+{
+ UINT16 dwEcIndexPort;
+
+ ReadPCI ((LPC_BUS_DEV_FUN << 16) + SB_LPC_REGA4, AccWidthUint16 | S3_SAVE, &dwEcIndexPort);
+ dwEcIndexPort &= ~(BIT0);
+ RWIO (dwEcIndexPort, AccWidthUint8, 0x00, 0xA5);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * ReadEC8 - Read EC register data
+ *
+ *
+ *
+ * @param[in] Address - EC Register Offset Value
+ * @param[in] Value - Read Data Buffer
+ *
+ */
+VOID
+ReadEC8 (
+ IN UINT8 Address,
+ IN UINT8* Value
+ )
+{
+ UINT16 dwEcIndexPort;
+
+ ReadPCI ((LPC_BUS_DEV_FUN << 16) + SB_LPC_REGA4, AccWidthUint16 | S3_SAVE, &dwEcIndexPort);
+ dwEcIndexPort &= ~(BIT0);
+ WriteIO (dwEcIndexPort, AccWidthUint8, &Address);
+ ReadIO (dwEcIndexPort + 1, AccWidthUint8, Value);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * WriteEC8 - Write date into EC register
+ *
+ *
+ *
+ * @param[in] Address - EC Register Offset Value
+ * @param[in] Value - Write Data Buffer
+ *
+ */
+VOID
+WriteEC8 (
+ IN UINT8 Address,
+ IN UINT8* Value
+ )
+{
+ UINT16 dwEcIndexPort;
+
+ ReadPCI ((LPC_BUS_DEV_FUN << 16) + SB_LPC_REGA4, AccWidthUint16 | S3_SAVE, &dwEcIndexPort);
+ dwEcIndexPort &= ~(BIT0);
+
+ WriteIO (dwEcIndexPort, AccWidthUint8, &Address);
+ WriteIO (dwEcIndexPort + 1, AccWidthUint8, Value);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * RWEC8 - Read/Write EC register
+ *
+ *
+ *
+ * @param[in] Address - EC Register Offset Value
+ * @param[in] AndMask - Data And Mask 8 bits
+ * @param[in] OrMask - Data OR Mask 8 bits
+ *
+ */
+VOID
+RWEC8 (
+ IN UINT8 Address,
+ IN UINT8 AndMask,
+ IN UINT8 OrMask
+ )
+{
+ UINT8 Result;
+ ReadEC8 (Address, &Result);
+ Result = (Result & AndMask) | OrMask;
+ WriteEC8 (Address, &Result);
+}
+
+// #endif
+
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