diff options
author | Zheng Bao <zheng.bao@amd.com> | 2011-01-18 09:29:19 +0000 |
---|---|---|
committer | Zheng Bao <Zheng.Bao@amd.com> | 2011-01-18 09:29:19 +0000 |
commit | 10219012f29692c7860e505cf2d71004ba82c1f3 (patch) | |
tree | fbaa62700cd328c4ac180f24e3c0e93d976008e0 /src/vendorcode/amd/cimx/sb800/AMDLIB.c | |
parent | 441426b486f695b462731d1026c07fb15406dc68 (diff) |
remove the code which is not ready to release.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6261 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/vendorcode/amd/cimx/sb800/AMDLIB.c')
-rw-r--r-- | src/vendorcode/amd/cimx/sb800/AMDLIB.c | 82 |
1 files changed, 0 insertions, 82 deletions
diff --git a/src/vendorcode/amd/cimx/sb800/AMDLIB.c b/src/vendorcode/amd/cimx/sb800/AMDLIB.c deleted file mode 100644 index cf3267fb68..0000000000 --- a/src/vendorcode/amd/cimx/sb800/AMDLIB.c +++ /dev/null @@ -1,82 +0,0 @@ -/*
- *****************************************************************************
- *
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- * ***************************************************************************
- *
- */
-
-#include "SBPLATFORM.h"
-
-UINT8
-getNumberOfCpuCores (
- OUT VOID
- )
-{
- UINT8 Result;
- Result = 1;
- Result = ReadNumberOfCpuCores ();
- return Result;
-}
-
-UINT32
-readAlink (
- IN UINT32 Index
- )
-{
- UINT32 Data;
- WriteIO (ALINK_ACCESS_INDEX, AccWidthUint32, &Index);
- ReadIO (ALINK_ACCESS_DATA, AccWidthUint32, &Data);
- //Clear Index
- Index = 0;
- WriteIO (ALINK_ACCESS_INDEX, AccWidthUint32, &Index);
- return Data;
-}
-
-VOID
-writeAlink (
- IN UINT32 Index,
- IN UINT32 Data
- )
-{
- WriteIO (ALINK_ACCESS_INDEX, AccWidthUint32 | S3_SAVE, &Index);
- WriteIO (ALINK_ACCESS_DATA, AccWidthUint32 | S3_SAVE, &Data);
- //Clear Index
- Index = 0;
- WriteIO (ALINK_ACCESS_INDEX, AccWidthUint32 | S3_SAVE, &Index);
-}
-
-VOID
-rwAlink (
- IN UINT32 Index,
- IN UINT32 AndMask,
- IN UINT32 OrMask
- )
-{
- UINT32 AccesType;
- AccesType = Index & 0xE0000000;
- if (AccesType == (AXINDC << 29)) {
- writeAlink ((SB_AX_INDXC_REG30 | AccesType), Index & 0x1FFFFFFF);
- Index = (SB_AX_DATAC_REG34 | AccesType);
- } else if (AccesType == (AXINDP << 29)) {
- writeAlink ((SB_AX_INDXP_REG38 | AccesType), Index & 0x1FFFFFFF);
- Index = (SB_AX_DATAP_REG3C | AccesType);
- }
- writeAlink (Index, (readAlink (Index) & AndMask) | OrMask );
-}
-
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