Remove leftover AMD CIMX RD890 vendorcode

Change-Id: Ic7d80b25c0815f3816ae40646d024e0d9fe61f08
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 0 insertions, 63 deletions

diff --git a/src/vendorcode/amd/cimx/rd890/nbPciePllControl.h b/src/vendorcode/amd/cimx/rd890/nbPciePllControl.h
deleted file mode 100644
index 44193a528c..0000000000
--- a/src/vendorcode/amd/cimx/rd890/nbPciePllControl.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/**
- * @file
- *
- * PLL off in L1 support.
- *
- *
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project:      CIMx-NB
- * @e sub-project:
- * @e \$Revision:$   @e \$Date:$
- *
- */
-/*****************************************************************************
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
- *       its contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- ***************************************************************************/
-#ifndef _NBPLLCONTROL_H_
-#define _NBPLLCONTROL_H_
-
-BOOLEAN
-PciePllOffComatibilityTest (
-  IN      CORE              CoreId,
-  IN      AMD_NB_CONFIG     *pConfig
-  );
-
-
-#pragma pack (push, 1)
-/// Framework for testing for ability to diable PLL in L1
-typedef struct  {
-  PCI_SCAN_PROTOCOL ScanPciePort;   ///< PCI scan protocol
-  PCI_ADDR          DownstreamPort; ///< Downstream port to enable ASPM
-  UINT8             MaxL1Latency;   ///< TBD
-  UINT8             LinkCount;      ///< TBD
-} PLLOFF_WORKSPACE;
-
-#pragma pack (pop)
-#endif