diff options
| author | Martin Roth <martinroth@google.com> | 2017-07-22 17:51:50 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-25 15:08:47 +0000 |
| commit | e203aa1d58d754c79381fb73f96d5a6a384d48a2 (patch) | |
| tree | 1d62b4abf51b21c7bca63d209ccc0e2e5c400de3 /src/vendorcode/amd/agesa | |
| parent | 3cbd3b03670d21ee149b919d4d38cb15cc9f6d52 (diff) | |
src/vendorcode/amd/agesa/f15tn: Fix bitmask
Fixes GCC 7.1 error:
error: '<<' in boolean context, did you mean '<' ?
Change-Id: I1a28522279982b30d25f1a4a4433a1db767f8a02
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/vendorcode/amd/agesa')
| -rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c index b3d0c8ba53..898ff0c1ba 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppHp.c @@ -85,7 +85,7 @@ FchGppHotPlugSmiProcess ( FailedPort = (UINT8) (1 << HpPort); if (FchGpp->GppGen2 && FchGpp->GppGen2Strap) { - GppS3Data &= (UINT8) !(1 << HpPort); + GppS3Data &= (UINT8) ~(1 << HpPort); if (GppPortPollingLtssm (FchGpp, FailedPort, TRUE, StdHeader)) { FchGppForceGen1 (FchGpp, FailedPort, StdHeader); FailedPort = GppPortPollingLtssm (FchGpp, FailedPort, FALSE, StdHeader); @@ -123,7 +123,7 @@ FchGppHotUnplugSmiProcess ( GppS3Data = 0x00; ReadMem ( ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x0D, AccessWidth8, &GppS3Data); FchGpp->PortCfg[HpPort].PortDetected = FALSE; - GppS3Data &= (UINT8) !(1 << (HpPort + 4)); + GppS3Data &= (UINT8) ~(1 << (HpPort + 4)); if (FchGpp->GppGen2 && FchGpp->GppGen2Strap) { FchGppForceGen2 (FchGpp, (UINT8) (1 << HpPort), StdHeader); |