diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-02 16:41:43 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-26 10:05:48 +0000 |
| commit | 63fac81fc80d701a785ed61a3b5738ea0a821169 (patch) | |
| tree | 7b50798c95fc1e3ec309351157197784e04131f8 /src/vendorcode/amd/agesa | |
| parent | 8bf978c2aa92aa194d74e6588344f579de5828de (diff) | |
AGESA: Implement POSTCAR_STAGE
Move all boards that have moved away from AGESA_LEGACY_WRAPPER
or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE.
We use POSTCAR_STAGE as a conditional in CAR teardown to tell
our MTRR setup is prepared such that invalidation without
writeback is a valid operation.
Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/agesa')
| -rw-r--r-- | src/vendorcode/amd/agesa/f12/gcccar.inc | 4 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/gcccar.inc | 4 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f15/gcccar.inc | 4 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f15tn/gcccar.inc | 4 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/gcccar.inc | 4 |
5 files changed, 20 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f12/gcccar.inc b/src/vendorcode/amd/agesa/f12/gcccar.inc index 6a81fc7add..c08c9f1291 100644 --- a/src/vendorcode/amd/agesa/f12/gcccar.inc +++ b/src/vendorcode/amd/agesa/f12/gcccar.inc @@ -678,7 +678,11 @@ fam12_enable_stack_hook_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif mov %bx, %ax # Restore INVD -> WBINVD bit _WRMSR diff --git a/src/vendorcode/amd/agesa/f14/gcccar.inc b/src/vendorcode/amd/agesa/f14/gcccar.inc index 10214a8f03..678990f5b6 100644 --- a/src/vendorcode/amd/agesa/f14/gcccar.inc +++ b/src/vendorcode/amd/agesa/f14/gcccar.inc @@ -826,7 +826,11 @@ fam14_enable_stack_hook_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD _WRMSR diff --git a/src/vendorcode/amd/agesa/f15/gcccar.inc b/src/vendorcode/amd/agesa/f15/gcccar.inc index 427c7e5622..5076272e11 100644 --- a/src/vendorcode/amd/agesa/f15/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15/gcccar.inc @@ -433,7 +433,11 @@ fam10_enable_stack_hook_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif mov %bx, %ax # Restore INVD -> WBINVD bit _WRMSR diff --git a/src/vendorcode/amd/agesa/f15tn/gcccar.inc b/src/vendorcode/amd/agesa/f15tn/gcccar.inc index 7ac9613fca..8e15503551 100644 --- a/src/vendorcode/amd/agesa/f15tn/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15tn/gcccar.inc @@ -1263,7 +1263,11 @@ fam15_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif #.if (bh == 01h) || (bh == 03h) ; Is this TN or KM? cmp $01, %bh diff --git a/src/vendorcode/amd/agesa/f16kb/gcccar.inc b/src/vendorcode/amd/agesa/f16kb/gcccar.inc index 26e61da34b..8ad4d1ddc4 100644 --- a/src/vendorcode/amd/agesa/f16kb/gcccar.inc +++ b/src/vendorcode/amd/agesa/f16kb/gcccar.inc @@ -615,7 +615,11 @@ fam16_disable_stack_remote_read_exit: # This shouldn't be used with S3 resume IF the stack/cache area is # not reserved and over system memory. #-------------------------------------------------------------------------- +#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) wbinvd +#else + invd +#endif #Do Standard Family 16 work mov $HWCR, %ecx # MSR:C001_0015h |