diff options
| author | Paul Menzel <pmenzel@molgen.mpg.de> | 2020-10-06 08:53:57 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-17 13:54:11 +0000 |
| commit | 30935b60389a8cf264226b3885f37dda8d98fe2b (patch) | |
| tree | 9149bae2021b66d53fb93b11cb31e54fabced6b1 /src/vendorcode/amd/agesa | |
| parent | d354c08f9c320714c68b699d2bcb9ecf51b8e673 (diff) | |
vendorcode/amd: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is
*defined* in this case. Fix all occurrences in AMD vendor code with the
command below.
$ git grep -l "is define at" src/vendorcode/amd/ | xargs sed -i 's/is define at/is defined at/'
Change-Id: Ia26c87aecb484dcb55737e417367757d38ce3b56
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa')
| -rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h | 6 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h index be373c7794..bc755f04d3 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h @@ -140,19 +140,19 @@ typedef struct _AZALIA_PIN { UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h index 9009f6bdb6..b31866581e 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h @@ -145,19 +145,19 @@ typedef struct _AZALIA_PIN { UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; |