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authorMike Banon <mikebdp2@gmail.com>2020-04-17 14:56:42 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-12-02 18:18:27 +0000
commitf7b410d4098009e65567f9ad5b7762923830f444 (patch)
treef14aa25725d1999b04d8ef452a92ef0e8caff5bb /src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h
parent3ee9935f6342b224e46a16d9148d0eedc43fff90 (diff)
vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profile
The ability to set up a custom memory profile is useful if you don't like the XMP memory profiles (if they exist) of your RAM sticks, or want to try some overclocking. Read SPD data will be overriden by your custom values. Tested on Crucial BLT8G3D1869DT1TX0 (1866MHz 9-9-9-27). Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: I1238ff00ef0efd11ea807794827476c30ac98065 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40489 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h')
-rw-r--r--src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h
index bc608a5052..472add0af4 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/DDR3/mtspd3.h
@@ -95,7 +95,7 @@
#define SPD_FTB 9
-#if CONFIG(CPU_AMD_AGESA_OPENSOURCE_MEM_JEDEC)
+#if CONFIG(CPU_AMD_AGESA_OPENSOURCE_MEM_JEDEC) || CONFIG(CPU_AMD_AGESA_OPENSOURCE_MEM_CUSTOM)
#define SPD_DIVIDENT 10
#define SPD_DIVISOR 11