AMD Kabini: Add AGESA/PI code for new processor family

Change-Id: Icb6f64e2e3cfd678fb4fb4f13f0e4b678d5acc4a
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-by: Nick Dill <nick.dill@se-eng.com>
Tested-by: Bruce Griffith <bruce.griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3836
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>

17 files changed, 2610 insertions, 0 deletions

diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h
new file mode 100644
index 0000000000..af2ff525f8
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h
@@ -0,0 +1,57 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * GNB register access services.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 86079 $   @e \$Date: 2013-01-16 00:59:04 -0600 (Wed, 16 Jan 2013) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+#ifndef _GNBCOMMONLIB_H_
+#define _GNBCOMMONLIB_H_
+
+#include "GnbLib.h"
+#include "GnbLibCpuAcc.h"
+#include "GnbLibHeap.h"
+#include "GnbLibIoAcc.h"
+#include "GnbLibMemAcc.h"
+#include "GnbLibPci.h"
+#include "GnbLibPciAcc.h"
+#include "GnbTimerLib.h"
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.c
new file mode 100644
index 0000000000..34990c51ed
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.c
@@ -0,0 +1,530 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * GNB register access services.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 85947 $   @e \$Date: 2013-01-14 17:25:21 -0600 (Mon, 14 Jan 2013) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include  "AGESA.h"
+#include  "Ids.h"
+#include  "amdlib.h"
+#include  "cpuFamilyTranslation.h"
+#include  "cpuServices.h"
+#include  "Gnb.h"
+#include  "GnbLib.h"
+#include  "GnbLibIoAcc.h"
+#include  "GnbLibPciAcc.h"
+#include  "GnbLibMemAcc.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIB_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+extern GNB_SERVICE  *ServiceTable;
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+VOID
+GnbLibPciIndirectReadField (
+  IN       UINT32       Address,
+  IN       UINT32       IndirectAddress,
+  IN       UINT8        FieldOffset,
+  IN       UINT8        FieldWidth,
+     OUT   UINT32       *Value,
+  IN       VOID         *Config
+  );
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read GNB indirect registers
+ *
+ *
+ *
+ * @param[in] Address         PCI address of indirect register
+ * @param[in] IndirectAddress Offset of indirect register
+ * @param[in] Width           Width
+ * @param[out] Value           Pointer to value
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibPciIndirectRead (
+  IN       UINT32       Address,
+  IN       UINT32       IndirectAddress,
+  IN       ACCESS_WIDTH Width,
+     OUT   VOID         *Value,
+  IN       VOID         *Config
+  )
+{
+  UINT32  IndexOffset;
+  IndexOffset = LibAmdAccessWidth (Width);
+  GnbLibPciWrite (Address, Width, &IndirectAddress, Config);
+  GnbLibPciRead (Address + IndexOffset, Width, Value, Config);
+}
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read GNB indirect registers field
+ *
+ *
+ *
+ * @param[in] Address         PCI address of indirect register
+ * @param[in] IndirectAddress Offset of indirect register
+ * @param[in] FieldOffset     Field offset
+ * @param[in] FieldWidth      Field width
+ * @param[out] Value          Pointer to value
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibPciIndirectReadField (
+  IN       UINT32       Address,
+  IN       UINT32       IndirectAddress,
+  IN       UINT8        FieldOffset,
+  IN       UINT8        FieldWidth,
+     OUT   UINT32       *Value,
+  IN       VOID         *Config
+  )
+{
+  UINT32  Mask;
+  GnbLibPciIndirectRead (Address, IndirectAddress, AccessWidth32, Value, Config);
+  Mask = (1 << FieldWidth) - 1;
+  *Value = (*Value >> FieldOffset) & Mask;
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Write GNB indirect registers
+ *
+ *
+ *
+ * @param[in] Address         PCI address of indirect register
+ * @param[in] IndirectAddress Offset of indirect register
+ * @param[in] Width           Width
+ * @param[in] Value           Pointer to value
+ * @param[in] Config          Pointer to standard header
+ */
+
+VOID
+GnbLibPciIndirectWrite (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      ACCESS_WIDTH  Width,
+  IN      VOID          *Value,
+  IN      VOID          *Config
+  )
+{
+  UINT32  IndexOffset;
+  IndexOffset = LibAmdAccessWidth (Width);
+  GnbLibPciWrite (Address, Width, &IndirectAddress, Config);
+  GnbLibPciWrite (Address + IndexOffset, Width, Value, Config);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Write GNB indirect registers field
+ *
+ *
+ *
+ * @param[in] Address         PCI address of indirect register
+ * @param[in] IndirectAddress Offset of indirect register
+ * @param[in] FieldOffset     Field offset
+ * @param[in] FieldWidth      Field width
+ * @param[in] Value           Pointer to value
+ * @param[in] S3Save          Save for S3 (TRUE/FALSE)
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibPciIndirectWriteField (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      UINT8         FieldOffset,
+  IN      UINT8         FieldWidth,
+  IN      UINT32        Value,
+  IN      BOOLEAN       S3Save,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Data;
+  UINT32  Mask;
+  GnbLibPciIndirectRead (Address, IndirectAddress, AccessWidth32, &Data, Config);
+  Mask = (1 << FieldWidth) - 1;
+  Data &= (~(Mask << FieldOffset));
+  Data |= ((Value & Mask) << FieldOffset);
+  GnbLibPciIndirectWrite (Address, IndirectAddress, S3Save ? AccessS3SaveWidth32 : AccessWidth32, &Data, Config);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read/Modify/Write GNB indirect registers field
+ *
+ *
+ *
+ * @param[in] Address         PCI address of indirect register
+ * @param[in] IndirectAddress Offset of indirect register
+ * @param[in] Width           Width
+ * @param[in] Mask            And Mask
+ * @param[in] Value           Or Value
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibPciIndirectRMW (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Data;
+  GnbLibPciIndirectRead (
+    Address,
+    IndirectAddress,
+    (Width >= AccessS3SaveWidth8) ? (Width - (AccessS3SaveWidth8 - AccessWidth8)) : Width,
+    &Data,
+    Config
+    );
+  Data = (Data & Mask) | Value;
+  GnbLibPciIndirectWrite (Address, IndirectAddress, Width, &Data, Config);
+}
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read/Modify/Write PCI registers
+ *
+ *
+ *
+ * @param[in] Address         PCI address
+ * @param[in] Width           Access width
+ * @param[in] Mask            AND Mask
+ * @param[in] Value           OR Value
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibPciRMW (
+  IN      UINT32        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Data;
+  GnbLibPciRead (Address, Width, &Data, Config);
+  Data = (Data & Mask) | Value;
+  GnbLibPciWrite (Address, Width, &Data, Config);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read/Modify/Write I/O registers
+ *
+ *
+ *
+ * @param[in] Address         I/O Port
+ * @param[in] Width           Access width
+ * @param[in] Mask            AND Mask
+ * @param[in] Value           OR Mask
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibIoRMW (
+  IN      UINT16        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Data;
+  GnbLibIoRead (Address, Width, &Data, Config);
+  Data = (Data & Mask) | Value;
+  GnbLibIoWrite (Address, Width, &Data, Config);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Indirect IO block read
+ *
+ *
+ *
+ * @param[in] IndexPort       Index Port
+ * @param[in] DataPort        Data Port
+ * @param[in] Width           Access width
+ * @param[in] IndexAddress    Index Address
+ * @param[in] Count           Count
+ * @param[in] Buffer          Buffer
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibIndirectIoBlockRead (
+  IN      UINT16        IndexPort,
+  IN      UINT16        DataPort,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        IndexAddress,
+  IN      UINT32        Count,
+  IN      VOID          *Buffer,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Index;
+  Index = IndexAddress;
+  for (; Index < (IndexAddress + Count); Index++) {
+    GnbLibIoWrite (IndexPort, Width, &Index, Config);
+    GnbLibIoRead (DataPort, Width,  Buffer, Config);
+    Buffer = (VOID *) ((UINT8 *) Buffer + LibAmdAccessWidth (Width));
+  }
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Get IOAPIC ID
+ *
+ *
+ *
+ * @param[in] IoApicBaseAddress   IO APIC base address
+ * @param[in] Config              Pointer to standard header
+ */
+UINT8
+GnbLiGetIoapicId (
+  IN      UINT64        IoApicBaseAddress,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Value;
+  Value = 0x0;
+  GnbLibMemWrite (IoApicBaseAddress, AccessWidth32, &Value, Config);
+  GnbLibMemRead (IoApicBaseAddress + 0x10, AccessWidth32, &Value, Config);
+  return (UINT8) (Value >> 24);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read/Modify/Write MMIO registers
+ *
+ *
+ *
+ * @param[in] Address         Physical address
+ * @param[in] Width           Access width
+ * @param[in] Mask            AND Mask
+ * @param[in] Value           OR Value
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibMemRMW (
+  IN      UINT64        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  )
+{
+  UINT32  Data;
+  GnbLibMemRead (Address, Width, &Data, Config);
+  Data = (Data & Mask) | Value;
+  GnbLibMemWrite (Address, Width, &Data, Config);
+}
+
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Calculate power of number
+ *
+ *
+ *
+ * @param[in]   Value         Number
+ * @param[in]   Power         Power
+ */
+
+UINT32
+GnbLibPowerOf (
+  IN      UINT32  Value,
+  IN      UINT32  Power
+  )
+{
+  UINT32  Result;
+  if (Power == 0) {
+    return 1;
+  }
+  Result = Value;
+  while ((--Power) > 0) {
+    Result *= Value;
+  }
+  return Result;
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Search buffer for pattern
+ *
+ *
+ * @param[in]  Buf1           Pointer to source buffer which will be subject of search
+ * @param[in]  Buf1Length     Length of the source buffer
+ * @param[in]  Buf2           Pointer to pattern buffer
+ * @param[in]  Buf2Length     Length of the pattern buffer
+ * @retval     Pointer on first occurrence of Buf2 in Buf1 or NULL
+ */
+
+VOID*
+GnbLibFind (
+  IN      UINT8               *Buf1,
+  IN      UINTN               Buf1Length,
+  IN      UINT8               *Buf2,
+  IN      UINTN               Buf2Length
+  )
+{
+  UINT8 *CurrentBuf1Ptr;
+  CurrentBuf1Ptr = Buf1;
+  while (CurrentBuf1Ptr < (Buf1 + Buf1Length - Buf2Length)) {
+    UINT8 *SourceBufPtr;
+    UINT8 *PatternBufPtr;
+    UINTN PatternBufLength;
+    SourceBufPtr = CurrentBuf1Ptr;
+    PatternBufPtr = Buf2;
+    PatternBufLength = Buf2Length;
+    while ((*SourceBufPtr++ == *PatternBufPtr++) && (PatternBufLength-- != 0));
+    if (PatternBufLength == 0) {
+      return CurrentBuf1Ptr;
+    }
+    CurrentBuf1Ptr++;
+  }
+  return NULL;
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Dump buffer to HDTOUT
+ *
+ *
+ * @param[in]     Buffer          Buffer pointer
+ * @param[in]     Count           Count of data elements
+ * @param[in]     DataWidth       DataWidth 1 - Byte; 2 - Word; 3 - DWORD; 4 - QWORD
+ * @param[in]     LineWidth       Number of data item per line
+ */
+VOID
+GnbLibDebugDumpBuffer (
+  IN       VOID             *Buffer,
+  IN       UINT32           Count,
+  IN       UINT8            DataWidth,
+  IN       UINT8            LineWidth
+  )
+{
+  UINT32  Index;
+  UINT32  DataItemCount;
+  ASSERT (LineWidth != 0);
+  ASSERT (DataWidth >= 1 && DataWidth <= 4);
+  DataItemCount = 0;
+  for (Index = 0; Index < Count; ) {
+    switch (DataWidth) {
+    case 1:
+      IDS_HDT_CONSOLE (GNB_TRACE, "%02x ", *((UINT8 *) Buffer + Index));
+      Index += 1;
+      break;
+    case 2:
+      IDS_HDT_CONSOLE (GNB_TRACE, "%04x ", *(UINT16 *) ((UINT8 *) Buffer + Index));
+      Index += 2;
+      break;
+    case 3:
+      IDS_HDT_CONSOLE (GNB_TRACE, "%08x ", *(UINT32 *) ((UINT8 *) Buffer + Index));
+      Index += 4;
+      break;
+    case 4:
+      IDS_HDT_CONSOLE (GNB_TRACE, "%08x%08", *(UINT32 *) ((UINT8 *) Buffer + Index), *(UINT32 *) ((UINT8 *) Buffer + Index + 4));
+      Index += 8;
+      break;
+    default:
+      IDS_HDT_CONSOLE (GNB_TRACE, "ERROR! Incorrect Data Width\n");
+      return;
+    }
+    if (++DataItemCount >= LineWidth) {
+      IDS_HDT_CONSOLE (GNB_TRACE, "\n");
+      DataItemCount = 0;
+    }
+  }
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Dump buffer to HDTOUT
+ *
+ *
+ * @param[in]     ServiceId       Service ID
+ * @param[in]     SocketId        Socket ID
+ * @param[in]     ServiceProtocol Service protocol
+ * @param[in]     StdHeader       Standard Configuration Header
+ */
+AGESA_STATUS
+GnbLibLocateService (
+  IN       GNB_SERVICE_ID       ServiceId,
+  IN       UINT8                SocketId,
+  IN       VOID                 **ServiceProtocol,
+  IN       AMD_CONFIG_PARAMS    *StdHeader
+  )
+{
+  GNB_SERVICE     *SeviceEntry;
+  CPU_LOGICAL_ID  LogicalId;
+  SeviceEntry = ServiceTable;
+  GetLogicalIdOfSocket (SocketId, &LogicalId, StdHeader);
+  while (SeviceEntry != NULL) {
+    if (SeviceEntry->ServiceId == ServiceId && (LogicalId.Family & SeviceEntry->Family) != 0) {
+      *ServiceProtocol = SeviceEntry->ServiceProtocol;
+      return AGESA_SUCCESS;
+    }
+    SeviceEntry = SeviceEntry->NextService;
+  }
+  return AGESA_UNSUPPORTED;
+}
+
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.h
new file mode 100644
index 0000000000..7e35615231
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLib.h
@@ -0,0 +1,156 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * GNB register access services.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+#ifndef _GNBLIB_H_
+#define _GNBLIB_H_
+
+#define IOC_WRITE_ENABLE 0x80
+
+VOID
+GnbLibPciIndirectWrite (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      ACCESS_WIDTH  Width,
+  IN      VOID          *Value,
+  IN      VOID          *Config
+  );
+
+VOID
+GnbLibPciIndirectRead (
+  IN       UINT32        Address,
+  IN       UINT32        IndirectAddress,
+  IN       ACCESS_WIDTH  Width,
+     OUT   VOID          *Value,
+  IN       VOID          *Config
+  );
+
+VOID
+GnbLibPciIndirectRMW (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  );
+
+VOID
+GnbLibPciIndirectWriteField (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      UINT8         FieldOffset,
+  IN      UINT8         FieldWidth,
+  IN      UINT32        Value,
+  IN      BOOLEAN       S3Save,
+  IN      VOID          *Config
+  );
+
+
+VOID
+GnbLibPciRMW (
+  IN      UINT32        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  );
+
+VOID
+GnbLibIoRMW (
+  IN      UINT16        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  );
+
+
+UINT32
+GnbLibPowerOf (
+  IN      UINT32            Value,
+  IN      UINT32            Power
+  );
+
+VOID*
+GnbLibFind (
+  IN      UINT8             *Buf1,
+  IN      UINTN             Buf1Length,
+  IN      UINT8             *Buf2,
+  IN      UINTN             Buf2Length
+  );
+
+VOID
+GnbLibIndirectIoBlockRead (
+  IN      UINT16            IndexPort,
+  IN      UINT16            DataPort,
+  IN      ACCESS_WIDTH      Width,
+  IN      UINT32            IndexAddress,
+  IN      UINT32            Count,
+  IN      VOID              *Buffer,
+  IN      VOID              *Config
+  );
+
+UINT8
+GnbLiGetIoapicId (
+  IN      UINT64            IoApicBaseAddress,
+  IN      VOID              *Config
+  );
+
+VOID
+GnbLibDebugDumpBuffer (
+  IN       VOID             *Buffer,
+  IN       UINT32           Count,
+  IN       UINT8            DataWidth,
+  IN       UINT8            LineWidth
+  );
+
+AGESA_STATUS
+GnbLibLocateService (
+  IN       GNB_SERVICE_ID       ServiceId,
+  IN       UINT8                SocketId,
+  IN       VOID                 **ServiceProtocol,
+  IN       AMD_CONFIG_PARAMS    *StdHeader
+  );
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c
new file mode 100644
index 0000000000..0430fba359
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c
@@ -0,0 +1,143 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access various CPU registers.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include  "Porting.h"
+#include  "AMD.h"
+#include  "GnbLibPciAcc.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBCPUACC_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+VOID
+GnbLibCpuPciIndirectRead (
+  IN       UINT32        Address,
+  IN       UINT32        IndirectAddress,
+     OUT   UINT32        *Value,
+  IN       VOID          *Config
+  );
+
+VOID
+GnbLibCpuPciIndirectWrite (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      UINT32        *Value,
+  IN      VOID          *Config
+  );
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read CPU (DCT) indirect registers
+ *
+ *
+ *
+ * @param[in]  Address         PCI address of DCT register
+ * @param[in]  IndirectAddress Offset of DCT register
+ * @param[out] Value           Pointer to value
+ * @param[in]  Config          Pointer to standard header
+ */
+VOID
+GnbLibCpuPciIndirectRead (
+  IN       UINT32        Address,
+  IN       UINT32        IndirectAddress,
+     OUT   UINT32        *Value,
+  IN       VOID          *Config
+  )
+{
+  UINT32  OffsetRegisterValue;
+  GnbLibPciWrite (Address, AccessWidth32, &IndirectAddress, Config);
+  do {
+    GnbLibPciRead (Address , AccessWidth32, &OffsetRegisterValue, Config);
+  } while ((OffsetRegisterValue & BIT31) == 0);
+  GnbLibPciRead (Address + 4, AccessWidth32, Value, Config);
+}
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Write CPU (DCT) indirect registers
+ *
+ *
+ *
+ * @param[in] Address         PCI address of DCT register
+ * @param[in] IndirectAddress Offset of DCT register
+ * @param[in] Value           Pointer to value
+ * @param[in] Config          Pointer to standard header
+ */
+VOID
+GnbLibCpuPciIndirectWrite (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      UINT32        *Value,
+  IN      VOID          *Config
+  )
+{
+  UINT32  OffsetRegisterValue;
+  OffsetRegisterValue = IndirectAddress | BIT30;
+  GnbLibPciWrite (Address + 4, AccessWidth32, Value, Config);
+  GnbLibPciWrite (Address, AccessWidth32, &IndirectAddress, Config);
+  do {
+    GnbLibPciRead (Address , AccessWidth32, &OffsetRegisterValue, Config);
+  } while ((OffsetRegisterValue & BIT31) == 0);
+}
+
+
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h
new file mode 100644
index 0000000000..f560b7b12b
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h
@@ -0,0 +1,65 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access various CPU registers.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+#ifndef _CPUACCLIB_H_
+#define _CPUACCLIB_H_
+
+VOID
+GnbLibCpuPciIndirectWrite (
+  IN      UINT32        Address,
+  IN      UINT32        IndirectAddress,
+  IN      UINT32        *Value,
+  IN      VOID          *Config
+  );
+
+VOID
+GnbLibCpuPciIndirectRead (
+  IN       UINT32        Address,
+  IN       UINT32        IndirectAddress,
+     OUT   UINT32        *Value,
+  IN       VOID          *Config
+  );
+
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c
new file mode 100644
index 0000000000..91af4bbbe0
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c
@@ -0,0 +1,176 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access heap.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include  "Porting.h"
+#include  "AMD.h"
+#include  "amdlib.h"
+#include  "heapManager.h"
+#include  "GnbLibPciAcc.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBHEAP_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+VOID *
+GnbAllocateHeapBuffer (
+  IN      UINT32              Handle,
+  IN      UINTN               Length,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+VOID *
+GnbAllocateHeapBufferAndClear (
+  IN      UINT32              Handle,
+  IN      UINTN               Length,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+VOID *
+GnbLocateHeapBuffer (
+  IN      UINT32              Handle,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Allocates space for a new buffer in the heap
+ *
+ *
+ * @param[in]      Handle            Buffer handle
+ * @param[in]      Length            Buffer length
+ * @param[in]      StdHeader         Standard configuration header
+ *
+ * @retval         NULL              Buffer allocation fail
+ *
+ */
+
+VOID *
+GnbAllocateHeapBuffer (
+  IN      UINT32              Handle,
+  IN      UINTN               Length,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  AGESA_STATUS          Status;
+  ALLOCATE_HEAP_PARAMS  AllocHeapParams;
+
+  AllocHeapParams.RequestedBufferSize = (UINT32) Length;
+  AllocHeapParams.BufferHandle = Handle;
+  AllocHeapParams.Persist = HEAP_SYSTEM_MEM;
+  Status = HeapAllocateBuffer (&AllocHeapParams, StdHeader);
+  if (Status != AGESA_SUCCESS) {
+    return NULL;
+  }
+  return AllocHeapParams.BufferPtr;
+}
+
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Allocates space for a new buffer in the heap and clear it
+ *
+ *
+ * @param[in]      Handle            Buffer handle
+ * @param[in]      Length            Buffer length
+ * @param[in]      StdHeader         Standard configuration header
+ *
+ * @retval         NULL              Buffer allocation fail
+ *
+ */
+
+VOID *
+GnbAllocateHeapBufferAndClear (
+  IN      UINT32              Handle,
+  IN      UINTN               Length,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  VOID  *Buffer;
+  Buffer = GnbAllocateHeapBuffer (Handle, Length, StdHeader);
+  if (Buffer != NULL) {
+    LibAmdMemFill (Buffer, 0x00, Length, StdHeader);
+  }
+  return Buffer;
+}
+
+/*---------------------------------------------------------------------------------------*/
+/**
+ * Locates a previously allocated buffer on the heap.
+ *
+ *
+ * @param[in]      Handle            Buffer handle
+ * @param[in]      StdHeader         Standard configuration header
+ *
+ * @retval         NULL              Buffer handle not found
+ *
+ */
+
+VOID *
+GnbLocateHeapBuffer (
+  IN      UINT32              Handle,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  AGESA_STATUS          Status;
+  LOCATE_HEAP_PTR       LocHeapParams;
+  LocHeapParams.BufferHandle = Handle;
+  Status = HeapLocateBuffer (&LocHeapParams, StdHeader);
+  if (Status != AGESA_SUCCESS) {
+    return NULL;
+  }
+  return LocHeapParams.BufferPtr;
+}
+
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h
new file mode 100644
index 0000000000..a751eee938
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h
@@ -0,0 +1,69 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access heap.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+#ifndef _GNBHEAPLIB_H_
+#define _GNBHEAPLIB_H_
+
+VOID *
+GnbAllocateHeapBuffer (
+  IN      UINT32              Handle,
+  IN      UINTN               Length,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+VOID *
+GnbLocateHeapBuffer (
+  IN      UINT32              Handle,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+VOID *
+GnbAllocateHeapBufferAndClear (
+  IN      UINT32              Handle,
+  IN      UINTN               Length,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c
new file mode 100644
index 0000000000..4e4fa7ac04
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c
@@ -0,0 +1,122 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+* Service procedure to access I/O registers.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include "Porting.h"
+#include "AMD.h"
+#include "amdlib.h"
+#include "GnbLibIoAcc.h"
+#include "S3SaveState.h"
+#include "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBIOACC_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+/*----------------------------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------------------*/
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Write I/O Port
+ *
+ *
+ *
+ * @param[in] Address         Physical Address
+ * @param[in] Width           Access width
+ * @param[in] Value           Pointer to value
+ * @param[in] StdHeader       Standard configuration header
+ */
+
+VOID
+GnbLibIoWrite (
+  IN       UINT16      Address,
+  IN       ACCESS_WIDTH Width,
+  IN       VOID         *Value,
+  IN       VOID         *StdHeader
+  )
+{
+  if (Width >= AccessS3SaveWidth8) {
+    S3_SAVE_IO_WRITE (StdHeader, Address, Width, Value);
+  }
+  LibAmdIoWrite (Width, Address, Value, StdHeader);
+}
+/**
+ * Read IO port
+ *
+ *
+ *
+ * @param[in]   Address         Physical Address
+ * @param[in]   Width           Access width
+ * @param[out]  Value           Pointer to value
+ * @param[in]   StdHeader       Standard configuration header
+ */
+
+VOID
+GnbLibIoRead (
+  IN       UINT16       Address,
+  IN       ACCESS_WIDTH Width,
+     OUT   VOID         *Value,
+  IN       VOID         *StdHeader
+  )
+{
+  LibAmdIoRead (Width, Address, Value, StdHeader);
+}
+
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h
new file mode 100644
index 0000000000..4521cfd616
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h
@@ -0,0 +1,66 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access I/O registers.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+#ifndef _IOACCLIB_H_
+#define _IOACCLIB_H_
+
+
+VOID
+GnbLibIoWrite (
+  IN      UINT16        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      VOID          *Value,
+  IN      VOID          *StdHeader
+  );
+
+VOID
+GnbLibIoRead (
+  IN      UINT16        Address,
+  IN      ACCESS_WIDTH  Width,
+  OUT     VOID          *Value,
+  IN      VOID          *StdHeader
+  );
+
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c
new file mode 100644
index 0000000000..ad6433bd93
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c
@@ -0,0 +1,125 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access MMIO registers.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include  "Porting.h"
+#include  "AMD.h"
+#include  "amdlib.h"
+#include  "GnbLibMemAcc.h"
+#include  "S3SaveState.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBMEMACC_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Write Memory/MMIO registers
+ *
+ *
+ *
+ * @param[in] Address         Physical Address
+ * @param[in] Width           Access width
+ * @param[in] Value           Pointer to value
+ * @param[in] StdHeader       Standard configuration header
+ */
+
+VOID
+GnbLibMemWrite (
+  IN      UINT64        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      VOID          *Value,
+  IN      VOID          *StdHeader
+  )
+{
+  if (Width >= AccessS3SaveWidth8) {
+    S3_SAVE_MEM_WRITE (StdHeader, Address, Width, Value);
+  }
+  LibAmdMemWrite (Width, Address, Value, StdHeader);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read Memory/MMIO registers
+ *
+ *
+ *
+ * @param[in]   Address         Physical Address
+ * @param[in]   Width           Access width
+ * @param[out]  Value           Pointer to value
+ * @param[in]   StdHeader       Standard configuration header
+ */
+
+VOID
+GnbLibMemRead (
+  IN       UINT64       Address,
+  IN       ACCESS_WIDTH Width,
+     OUT   VOID         *Value,
+  IN       VOID         *StdHeader
+  )
+{
+  LibAmdMemRead (Width, Address, Value, StdHeader);
+}
+
+
+
+
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h
new file mode 100644
index 0000000000..908b1ec724
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h
@@ -0,0 +1,73 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access MMIO registers.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+#ifndef _MEMACCLIB_H_
+#define _MEMACCLIB_H_
+
+VOID
+GnbLibMemWrite (
+  IN      UINT64        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      VOID          *Value,
+  IN      VOID          *StdHeader
+  );
+
+VOID
+GnbLibMemRead (
+  IN      UINT64        Address,
+  IN      ACCESS_WIDTH  Width,
+  OUT     VOID          *Value,
+  IN      VOID          *StdHeader
+  );
+
+VOID
+GnbLibMemRMW (
+  IN      UINT64        Address,
+  IN      ACCESS_WIDTH  Width,
+  IN      UINT32        Mask,
+  IN      UINT32        Value,
+  IN      VOID          *Config
+  );
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c
new file mode 100644
index 0000000000..10ef0a3f6e
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c
@@ -0,0 +1,403 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Various PCI service routines.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 85947 $   @e \$Date: 2013-01-14 17:25:21 -0600 (Mon, 14 Jan 2013) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+
+#include  "AGESA.h"
+#include  "amdlib.h"
+#include  "Gnb.h"
+#include  "GnbLibPciAcc.h"
+#include  "GnbLibPci.h"
+#include  "GnbLib.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCI_FILECODE
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Check if device present
+ *
+ *
+ *
+ * @param[in] Address         PCI address (as described in PCI_ADDR)
+ * @param[in] StdHeader       Standard configuration header
+ * @retval    TRUE            Device is present
+ * @retval    FALSE           Device is not present
+ */
+
+BOOLEAN
+GnbLibPciIsDevicePresent (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT32  DeviceId;
+  GnbLibPciRead (Address, AccessWidth32, &DeviceId, StdHeader);
+  if (DeviceId == 0xffffffff) {
+    return FALSE;
+  } else {
+    return TRUE;
+  }
+}
+
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Check if device is bridge
+ *
+ *
+ *
+ * @param[in] Address         PCI address (as described in PCI_ADDR)
+ * @param[in] StdHeader       Standard configuration header
+ * @retval    TRUE            Device is a bridge
+ * @retval    FALSE           Device is not a bridge
+ */
+
+BOOLEAN
+GnbLibPciIsBridgeDevice (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT8   Header;
+  GnbLibPciRead (Address | 0xe, AccessWidth8, &Header, StdHeader);
+  if ((Header & 0x7f) == 1) {
+    return TRUE;
+  } else {
+    return FALSE;
+  }
+}
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Check if device is multifunction
+ *
+ *
+ *
+ * @param[in] Address         PCI address (as described in PCI_ADDR)
+ * @param[in] StdHeader       Standard configuration header
+ * @retval    TRUE            Device is a multifunction device.
+ * @retval    FALSE           Device is a single function device.
+ *
+ */
+BOOLEAN
+GnbLibPciIsMultiFunctionDevice (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT8   Header;
+  GnbLibPciRead (Address | 0xe, AccessWidth8, &Header, StdHeader);
+  if ((Header & 0x80) != 0) {
+    return TRUE;
+  } else {
+    return FALSE;
+  }
+}
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Check if device is PCIe device
+ *
+ *
+ *
+ * @param[in] Address         PCI address (as described in PCI_ADDR)
+ * @param[in] StdHeader       Standard configuration header
+ * @retval    TRUE            Device is a PCIe device
+ * @retval    FALSE           Device is not a PCIe device
+ *
+ */
+
+BOOLEAN
+GnbLibPciIsPcieDevice (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  if (GnbLibFindPciCapability (Address, PCIE_CAP_ID, StdHeader) != 0 ) {
+    return TRUE;
+  } else {
+    return FALSE;
+  }
+}
+
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Find PCI capability pointer
+ *
+ *
+ *
+ * @param[in] Address         PCI address (as described in PCI_ADDR)
+ * @param[in] CapabilityId    PCI capability ID
+ * @param[in] StdHeader       Standard configuration header
+ * @retval                    Register address of capability pointer
+ *
+ */
+
+UINT8
+GnbLibFindPciCapability (
+  IN      UINT32              Address,
+  IN      UINT8               CapabilityId,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT8     CapabilityPtr;
+  UINT8     CurrentCapabilityId;
+  CapabilityPtr = 0x34;
+  if (!GnbLibPciIsDevicePresent (Address, StdHeader)) {
+    return  0;
+  }
+  while (CapabilityPtr != 0) {
+    GnbLibPciRead (Address | CapabilityPtr, AccessWidth8 , &CapabilityPtr, StdHeader);
+    if (CapabilityPtr != 0) {
+      GnbLibPciRead (Address | CapabilityPtr , AccessWidth8 , &CurrentCapabilityId, StdHeader);
+      if (CurrentCapabilityId == CapabilityId) {
+        break;
+      }
+      CapabilityPtr++;
+    }
+  }
+  return  CapabilityPtr;
+}
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Find PCIe extended capability pointer
+ *
+ *
+ *
+ * @param[in] Address               PCI address (as described in PCI_ADDR)
+ * @param[in] ExtendedCapabilityId  Extended PCIe capability ID
+ * @param[in] StdHeader             Standard configuration header
+ * @retval                          Register address of extended capability pointer
+ *
+ */
+
+
+UINT16
+GnbLibFindPcieExtendedCapability (
+  IN      UINT32              Address,
+  IN      UINT16              ExtendedCapabilityId,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT16  CapabilityPtr;
+  UINT32  ExtendedCapabilityIdBlock;
+  if (GnbLibPciIsPcieDevice (Address, StdHeader)) {
+    GnbLibPciRead (Address | 0x100 , AccessWidth32 , &ExtendedCapabilityIdBlock, StdHeader);
+    if ((ExtendedCapabilityIdBlock != 0) && ((UINT16)ExtendedCapabilityIdBlock != 0xffff)) {
+      do {
+        CapabilityPtr = (UINT16) ((ExtendedCapabilityIdBlock >> 20) & 0xfff);
+        if ((UINT16)ExtendedCapabilityIdBlock == ExtendedCapabilityId) {
+          return  CapabilityPtr;
+        }
+        GnbLibPciRead (Address | CapabilityPtr , AccessWidth32 , &ExtendedCapabilityIdBlock, StdHeader);
+      } while (((ExtendedCapabilityIdBlock >> 20) & 0xfff) !=  0);
+    }
+  }
+  return  0;
+}
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Scan range of device on PCI bus.
+ *
+ *
+ *
+ * @param[in] Start           Start address to start scan from
+ * @param[in] End             End address of scan
+ * @param[in] ScanData        Supporting data
+ *
+ */
+/*----------------------------------------------------------------------------------------*/
+VOID
+GnbLibPciScan (
+  IN      PCI_ADDR            Start,
+  IN      PCI_ADDR            End,
+  IN      GNB_PCI_SCAN_DATA   *ScanData
+  )
+{
+  UINTN       Bus;
+  UINTN       Device;
+  UINTN       LastDevice;
+  UINTN       Function;
+  UINTN       LastFunction;
+  PCI_ADDR    PciDevice;
+  SCAN_STATUS Status;
+
+  for (Bus = Start.Address.Bus; Bus <= End.Address.Bus; Bus++) {
+    Device = (Bus == Start.Address.Bus) ? Start.Address.Device : 0x00;
+    LastDevice = (Bus == End.Address.Bus) ? End.Address.Device : 0x1F;
+    for ( ; Device <= LastDevice; Device++) {
+      if ((Bus == Start.Address.Bus) && (Device == Start.Address.Device)) {
+        Function = Start.Address.Function;
+      } else {
+        Function = 0x0;
+      }
+      PciDevice.AddressValue = MAKE_SBDFO (0, Bus, Device, Function, 0);
+      if (!GnbLibPciIsDevicePresent (PciDevice.AddressValue, ScanData->StdHeader)) {
+        continue;
+      }
+      if (GnbLibPciIsMultiFunctionDevice (PciDevice.AddressValue, ScanData->StdHeader)) {
+        if ((Bus == End.Address.Bus) && (Device == End.Address.Device)) {
+          LastFunction = Start.Address.Function;
+        } else {
+          LastFunction = 0x7;
+        }
+      } else {
+        LastFunction = 0x0;
+      }
+      for ( ; Function <= LastFunction; Function++) {
+        PciDevice.AddressValue = MAKE_SBDFO (0, Bus, Device, Function, 0);
+        if (GnbLibPciIsDevicePresent (PciDevice.AddressValue, ScanData->StdHeader)) {
+          Status = ScanData->GnbScanCallback (PciDevice, ScanData);
+          if ((Status & SCAN_SKIP_FUNCTIONS) != 0) {
+            Function = LastFunction + 1;
+          }
+          if ((Status & SCAN_SKIP_DEVICES) != 0) {
+            Device = LastDevice + 1;
+          }
+          if ((Status & SCAN_SKIP_BUSES) != 0) {
+            Bus = End.Address.Bus + 1;
+          }
+        }
+      }
+    }
+  }
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Scan all subordinate buses
+ *
+ *
+ * @param[in]   Bridge            PCI bridge address
+ * @param[in,out] ScanData        Scan configuration data
+ *
+ */
+VOID
+GnbLibPciScanSecondaryBus (
+  IN       PCI_ADDR             Bridge,
+  IN OUT   GNB_PCI_SCAN_DATA    *ScanData
+  )
+{
+  PCI_ADDR  StartRange;
+  PCI_ADDR  EndRange;
+  UINT8     SecondaryBus;
+  GnbLibPciRead (Bridge.AddressValue | 0x19, AccessWidth8, &SecondaryBus, ScanData->StdHeader);
+  if (SecondaryBus != 0) {
+    StartRange.AddressValue = MAKE_SBDFO (0, SecondaryBus, 0, 0, 0);
+    EndRange.AddressValue = MAKE_SBDFO (0, SecondaryBus, 0x1f, 0x7, 0);
+    GnbLibPciScan (StartRange, EndRange, ScanData);
+  }
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Get PCIe device type
+ *
+ *
+ *
+ * @param[in] Device      PCI address of device.
+ * @param[in] StdHeader  Northbridge configuration structure pointer.
+ *
+ * @retval    PCIE_DEVICE_TYPE
+ */
+ /*----------------------------------------------------------------------------------------*/
+
+PCIE_DEVICE_TYPE
+GnbLibGetPcieDeviceType (
+  IN      PCI_ADDR            Device,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT8       PcieCapPtr;
+  UINT8       Value;
+
+  PcieCapPtr = GnbLibFindPciCapability (Device.AddressValue, PCIE_CAP_ID, StdHeader);
+  if (PcieCapPtr != 0) {
+    GnbLibPciRead (Device.AddressValue | (PcieCapPtr + 0x2) , AccessWidth8, &Value, StdHeader);
+    return Value >> 4;
+  }
+  return PcieNotPcieDevice;
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Save config space area
+ *
+ *
+ *
+ * @param[in] Address                 PCI address of device.
+ * @param[in] StartRegisterAddress    Start register address.
+ * @param[in] EndRegisterAddress      End register address.
+ * @param[in] Width                   Access width.
+ * @param[in] StdHeader               Standard header.
+ *
+ */
+ /*----------------------------------------------------------------------------------------*/
+
+VOID
+GnbLibS3SaveConfigSpace (
+  IN      UINT32              Address,
+  IN      UINT16              StartRegisterAddress,
+  IN      UINT16              EndRegisterAddress,
+  IN      ACCESS_WIDTH        Width,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT16    Index;
+  UINT16    Delta;
+  UINT16    Length;
+  Length = (StartRegisterAddress < EndRegisterAddress) ? (EndRegisterAddress - StartRegisterAddress) : (StartRegisterAddress - EndRegisterAddress);
+  Delta = LibAmdAccessWidth (Width);
+  for (Index = 0; Index <= Length; Index = Index + Delta) {
+    GnbLibPciRMW (
+      Address | ((StartRegisterAddress < EndRegisterAddress) ? (StartRegisterAddress + Index) : (StartRegisterAddress - Index)),
+      Width,
+      0xffffffff,
+      0x0,
+      StdHeader
+      );
+  }
+}
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h
new file mode 100644
index 0000000000..d1cf252c95
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h
@@ -0,0 +1,166 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Various PCI service routines.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+#ifndef _GNBLIBPCI_H_
+#define _GNBLIBPCI_H_
+
+#define PCIE_CAP_ID                 0x10
+#define IOMMU_CAP_ID                0x0F
+
+/// PCIe device type
+typedef enum {
+  PcieDeviceEndPoint,                       ///< Endpoint
+  PcieDeviceLegacyEndPoint,                 ///< Legacy endpoint
+  PcieDeviceRootComplex = 4,                ///< Root complex
+  PcieDeviceUpstreamPort,                   ///< Upstream port
+  PcieDeviceDownstreamPort,                 ///< Downstream Port
+  PcieDevicePcieToPcix,                     ///< PCIe to PCI/PCIx bridge
+  PcieDevicePcixToPcie,                     ///< PCI/PCIx to PCIe bridge
+  PcieNotPcieDevice = 0xff                  ///< unknown device
+} PCIE_DEVICE_TYPE;
+
+typedef  UINT32 SCAN_STATUS;
+
+#define SCAN_SKIP_FUNCTIONS         0x1
+#define SCAN_SKIP_DEVICES           0x2
+#define SCAN_SKIP_BUSES             0x4
+#define SCAN_SUCCESS                0x0
+
+//  Forward declaration needed for multi-structure mutual references
+AGESA_FORWARD_DECLARATION (GNB_PCI_SCAN_DATA);
+
+typedef SCAN_STATUS (*GNB_SCAN_CALLBACK) (
+  IN       PCI_ADDR             Device,
+  IN OUT   GNB_PCI_SCAN_DATA    *ScanData
+  );
+
+///Scan supporting data
+struct _GNB_PCI_SCAN_DATA {
+  GNB_SCAN_CALLBACK     GnbScanCallback;  ///< Callback for each found device
+  AMD_CONFIG_PARAMS     *StdHeader;       ///< Standard configuration header
+};
+
+#define   PCIE_CAP_ID               0x10
+#define   PCIE_LINK_CAP_REGISTER    0x0C
+#define   PCIE_LINK_CTRL_REGISTER   0x10
+#define   PCIE_DEVICE_CAP_REGISTER  0x04
+#define   PCIE_DEVICE_CTRL_REGISTER 0x08
+#define   PCIE_ASPM_L1_SUPPORT_CAP  BIT11
+
+#define MAX_PAYLOAD_128             0x0     ///< Max allowed payload size 128 bytes
+#define MAX_PAYLOAD_256             0x1     ///< Max allowed payload size 256 bytes
+#define MAX_PAYLOAD_512             0x2     ///< Max allowed payload size 512 bytes
+#define MAX_PAYLOAD_1024            0x3     ///< Max allowed payload size 1024 bytes
+#define MAX_PAYLOAD_2048            0x4     ///< Max allowed payload size 2048 bytes
+#define MAX_PAYLOAD_4096            0x5     ///< Max allowed payload size 4096 bytes
+#define MAX_PAYLOAD                 0x5     ///< Max allowed payload size according to spec is 101b (4096 bytes)
+
+BOOLEAN
+GnbLibPciIsDevicePresent (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+BOOLEAN
+GnbLibPciIsBridgeDevice (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+BOOLEAN
+GnbLibPciIsMultiFunctionDevice (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+BOOLEAN
+GnbLibPciIsPcieDevice (
+  IN      UINT32              Address,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+UINT8
+GnbLibFindPciCapability (
+  IN      UINT32              Address,
+  IN      UINT8               CapabilityId,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+VOID
+GnbLibPciScan (
+  IN      PCI_ADDR            Start,
+  IN      PCI_ADDR            End,
+  IN      GNB_PCI_SCAN_DATA   *ScanData
+ );
+
+VOID
+GnbLibPciScanSecondaryBus (
+  IN       PCI_ADDR             Bridge,
+  IN OUT   GNB_PCI_SCAN_DATA    *ScanData
+  );
+
+PCIE_DEVICE_TYPE
+GnbLibGetPcieDeviceType (
+  IN      PCI_ADDR            Device,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+VOID
+GnbLibS3SaveConfigSpace (
+  IN      UINT32              Address,
+  IN      UINT16              StartRegisterAddress,
+  IN      UINT16              EndRegisterAddress,
+  IN      ACCESS_WIDTH        Width,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+UINT16
+GnbLibFindPcieExtendedCapability (
+  IN      UINT32              Address,
+  IN      UINT16              ExtendedCapabilityId,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  );
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c
new file mode 100644
index 0000000000..d9d708fa65
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c
@@ -0,0 +1,156 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access PCI config space registers
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+/*----------------------------------------------------------------------------------------
+ *                             M O D U L E S    U S E D
+ *----------------------------------------------------------------------------------------
+ */
+#include  "Porting.h"
+#include  "AMD.h"
+#include  "amdlib.h"
+#include  "GnbLibPciAcc.h"
+#include  "S3SaveState.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBLIBPCIACC_FILECODE
+/*----------------------------------------------------------------------------------------
+ *                   D E F I N I T I O N S    A N D    M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *                  T Y P E D E F S     A N D     S T R U C T U  R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+
+/*----------------------------------------------------------------------------------------
+ *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Write PCI registers
+ *
+ *
+ *
+ * @param[in] Address         PCI address (as presented in PCI_ADDR.AddressValue)
+ * @param[in] Width           Access width
+ * @param[in] Value           Pointer to value
+ * @param[in] StdHeader       Pointer to standard header
+ */
+VOID
+GnbLibPciWrite (
+  IN      UINT32              Address,
+  IN      ACCESS_WIDTH        Width,
+  IN      VOID                *Value,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  PCI_ADDR  PciAddress;
+  PciAddress.AddressValue = Address;
+  if (Width >= AccessS3SaveWidth8) {
+    S3_SAVE_PCI_WRITE (StdHeader, PciAddress, Width, Value);
+  }
+  LibAmdPciWrite (Width, PciAddress, Value, StdHeader);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Read PCI registers
+ *
+ *
+ *
+ * @param[in]   Address         PCI address (as presented in PCI_ADDR.AddressValue)
+ * @param[in]   Width           Access width
+ * @param[out]  Value           Pointer to value
+ * @param[in]   StdHeader       Pointer to standard header
+ */
+
+VOID
+GnbLibPciRead (
+  IN       UINT32             Address,
+  IN       ACCESS_WIDTH       Width,
+     OUT   VOID               *Value,
+  IN       AMD_CONFIG_PARAMS  *StdHeader
+  )
+{
+  PCI_ADDR  PciAddress;
+  PciAddress.AddressValue = Address;
+  LibAmdPciRead (Width, PciAddress, Value, StdHeader);
+}
+
+
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Poll PCI reg
+ *
+ *
+ *
+ * @param[in] Address       PCI address (as presented in PCI_ADDR.AddressValue)
+ * @param[in] Width         Access width
+ * @param[in] Data          Data to compare
+ * @param[in] DataMask      AND mask
+ * @param[in] StdHeader     Standard configuration header
+ */
+
+VOID
+GnbLibPciPoll (
+  IN      UINT32             Address,
+  IN      ACCESS_WIDTH       Width,
+  IN      VOID               *Data,
+  IN      VOID               *DataMask,
+  IN      AMD_CONFIG_PARAMS  *StdHeader
+  )
+{
+  PCI_ADDR  PciAddress;
+  PciAddress.AddressValue = Address;
+  if (Width >= AccessS3SaveWidth8) {
+    S3_SAVE_PCI_POLL (StdHeader, PciAddress, Width, Data, DataMask, 0xffffffff);
+  }
+  LibAmdPciPoll (Width, PciAddress, Data, DataMask, 0xffffffff, StdHeader);
+}
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h
new file mode 100644
index 0000000000..14808e07ff
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h
@@ -0,0 +1,73 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Service procedure to access PCI config space registers
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 84150 $   @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+#ifndef _GNBLIBPCIACC_H_
+#define _GNBLIBPCIACC_H_
+
+VOID
+GnbLibPciWrite (
+  IN      UINT32              Address,
+  IN      ACCESS_WIDTH        Width,
+  IN      VOID                *Value,
+  IN      AMD_CONFIG_PARAMS  *StdHeader
+  );
+
+VOID
+GnbLibPciRead (
+  IN       UINT32             Address,
+  IN       ACCESS_WIDTH       Width,
+     OUT   VOID               *Value,
+  IN       AMD_CONFIG_PARAMS  *StdHeader
+  );
+
+VOID
+GnbLibPciPoll (
+  IN      UINT32             Address,
+  IN      ACCESS_WIDTH       Width,
+  IN      VOID               *Data,
+  IN      VOID               *DataMask,
+  IN      AMD_CONFIG_PARAMS  *StdHeader
+  );
+
+#endif
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.c b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.c
new file mode 100644
index 0000000000..bbbede825d
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.c
@@ -0,0 +1,157 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Various Timer services.
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 86079 $   @e \$Date: 2013-01-16 00:59:04 -0600 (Wed, 16 Jan 2013) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+
+#include  "AGESA.h"
+#include  "amdlib.h"
+#include  "S3SaveState.h"
+#include  "Gnb.h"
+#include  "GnbLib.h"
+#include  "GnbTimerLib.h"
+#include  "GnbFamServices.h"
+#include  "GnbPcieConfig.h"
+#include  "GnbCommonLib.h"
+#include  "Filecode.h"
+#define FILECODE PROC_GNB_MODULES_GNBCOMMONLIB_GNBTIMERLIB_FILECODE
+
+
+
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Stall and save to script table
+ *
+ *
+ *
+ * @param[in] Microsecond     Stall time
+ * @param[in] StdHeader       Standard configuration header
+ */
+
+VOID
+GnbLibStallS3Save (
+  IN      UINT32              Microsecond,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  S3_SAVE_DISPATCH (StdHeader, GnbLibStallS3Script_ID, sizeof (Microsecond), &Microsecond);
+  GnbLibStall (Microsecond, StdHeader);
+}
+
+
+/*----------------------------------------------------------------------------------------*/
+/*
+ * Stall
+ *
+ *
+ *
+ * @param[in] Microsecond     Stall time
+ * @param[in] StdHeader       Standard configuration header
+ */
+
+VOID
+GnbLibStall (
+  IN      UINT32              Microsecond,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+  )
+{
+  UINT32 TimeStampStart;
+  UINT32 TimeStampDelta;
+  UINT32 TimeStampCurrent;
+
+  TimeStampStart = GnbFmTimeStamp (StdHeader);
+  do {
+    TimeStampCurrent = GnbFmTimeStamp (StdHeader);
+    TimeStampDelta = ((TimeStampCurrent > TimeStampStart) ? (TimeStampCurrent - TimeStampStart) : (0xffffffffull - TimeStampStart + TimeStampCurrent));
+  } while (TimeStampDelta < Microsecond);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Stall S3 script
+ *
+ *
+ *
+ * @param[in]  StdHeader      Standard configuration header
+ * @param[in]  ContextLength  Context Length (not used)
+ * @param[in]  Context        pointer to UINT32 number of us
+ */
+VOID
+GnbLibStallS3Script (
+  IN      AMD_CONFIG_PARAMS    *StdHeader,
+  IN      UINT16               ContextLength,
+  IN      VOID*                Context
+  )
+{
+  GnbLibStall (* ((UINT32*) Context), StdHeader);
+}
+
+/*----------------------------------------------------------------------------------------*/
+/**
+ * Family specific time stamp function
+ *
+ *
+ * @param[in]  StdHeader       Standard configuration header
+ * @retval                     Count
+ */
+UINT32
+GnbFmTimeStamp (
+  IN       AMD_CONFIG_PARAMS          *StdHeader
+  )
+{
+  AGESA_STATUS               Status;
+  GNB_FAM_TS_SERVICES       *GnbFamTsFunc;
+  GNB_HANDLE                *GnbHandle;
+
+  GnbHandle = GnbGetHandle (StdHeader);
+
+  Status = GnbLibLocateService (GnbFamTsService, GnbGetSocketId (GnbHandle), (VOID **)&GnbFamTsFunc, StdHeader);
+  ASSERT (Status == AGESA_SUCCESS);
+  if (Status == AGESA_SUCCESS) {
+    return GnbFamTsFunc->GnbFmTimeStamp (StdHeader);
+  }
+  return 0;
+}
+
+
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.h b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.h
new file mode 100644
index 0000000000..c7796d1202
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/GNB/Modules/GnbCommonLib/GnbTimerLib.h
@@ -0,0 +1,73 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * Various Timer Services
+ *
+ *
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project:     AGESA
+ * @e sub-project: GNB
+ * @e \$Revision: 86079 $   @e \$Date: 2013-01-16 00:59:04 -0600 (Wed, 16 Jan 2013) $
+ *
+ */
+/*
+*****************************************************************************
+*
+ * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ *       its contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* ***************************************************************************
+*
+*/
+
+#ifndef _GNBTIMERLIB_H_
+#define _GNBTIMERLIB_H_
+
+VOID
+GnbLibStallS3Save (
+  IN      UINT32              Microsecond,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+VOID
+GnbLibStall (
+  IN      UINT32              Microsecond,
+  IN      AMD_CONFIG_PARAMS   *StdHeader
+ );
+
+UINT32
+GnbFmTimeStamp (
+  IN       AMD_CONFIG_PARAMS          *StdHeader
+  );
+
+VOID
+GnbLibStallS3Script (
+  IN      AMD_CONFIG_PARAMS    *StdHeader,
+  IN      UINT16               ContextLength,
+  IN      VOID*                Context
+  );
+
+#endif