diff options
| author | WANG Siyuan <wangsiyuanbuaa@gmail.com> | 2013-07-31 16:55:26 +0800 |
|---|---|---|
| committer | Bruce Griffith <Bruce.Griffith@se-eng.com> | 2013-10-15 05:01:11 +0200 |
| commit | 7b6d412dbc4e5c11d3dd7890abf0edf279b3f504 (patch) | |
| tree | 9d41c0b6299cab6a90616fdbc3e31d6ef67797c6 /src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h | |
| parent | f8bf5a10c599ef071998bbc3f16e9e3d7fcdb6eb (diff) | |
vendorcode/amd/agesa/f16kb: Update Kabini PI from v1.0.0.0 to v1.0.0.7
The platform initialization (PI) code v1.0.0.7 for Kabini has some
enhancements like ECC DIMM support, new CPU microcode rev 0700010B, FCH
bug fix (RTC) and so on.
Use the name Kabini instead of Kerala everywhere.
Note, the former PI code was indeed version v1.0.0.0 instead of v0.0.1.0
as used in `AGESA_VERSION_STRING`.
Change-Id: I186de1aef222cd35ea69efa93967a3ffb8da7248
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3935
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h')
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h index a67439a68a..c370d4c9cf 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h @@ -1617,8 +1617,13 @@ FCH_MISC_REGF0 EQU 0F0h #define KABINI_OSC_OUT_CLOCK_SEL_48MHz 0x02 #define KABINI_OSC_OUT_CLOCK_SEL_25MHz 0x01 +#define RTC_WORKAROUND_SECOND 0x00 +#define RTC_VALID_SECOND_VALUE 0x59 +#define RTC_SECOND_RESET_VALUE 0x30 +#define RTC_SECOND_LOWER_NIBBLE 0x0F +#define RTC_VALID_SECOND_VALUE_LN 0x09 + #ifndef FCH_DEADLOOP #define FCH_DEADLOOP() { volatile UINTN __i; __i = 1; while (__i); } #endif - |