AGESA f16kb vendorcode: Split to Makefile.inc files

Change-Id: Id3d9a365469f7d73788cad4095ec3495fc9baf3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

4 files changed, 67 insertions, 0 deletions

diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/Makefile.inc
new file mode 100644
index 0000000000..89b9fc5b85
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/Makefile.inc
@@ -0,0 +1,21 @@
+libagesa-y += F16KbC6State.c
+libagesa-y += F16KbCacheFlushOnHalt.c
+libagesa-y += F16KbCoreAfterReset.c
+libagesa-y += F16KbCpb.c
+libagesa-y += F16KbDmi.c
+libagesa-y += F16KbEquivalenceTable.c
+libagesa-y += F16KbHtc.c
+libagesa-y += F16KbId7001MicrocodePatch.c
+libagesa-y += F16KbInitEarlyTable.c
+libagesa-y += F16KbIoCstate.c
+libagesa-y += F16KbLogicalIdTables.c
+libagesa-y += F16KbMicrocodePatchTables.c
+libagesa-y += F16KbMsrTables.c
+libagesa-y += F16KbNbAfterReset.c
+libagesa-y += F16KbPciTables.c
+libagesa-y += F16KbPowerCheck.c
+libagesa-y += F16KbPowerMgmtSystemTables.c
+libagesa-y += F16KbPsi.c
+libagesa-y += F16KbPstate.c
+libagesa-y += F16KbSharedMsrTable.c
+libagesa-y += F16KbUtilities.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/Makefile.inc
new file mode 100644
index 0000000000..5208d9ab0e
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/Makefile.inc
@@ -0,0 +1,9 @@
+libagesa-y += cpuF16Apm.c
+libagesa-y += cpuF16BrandId.c
+libagesa-y += cpuF16CacheDefaults.c
+libagesa-y += cpuF16Dmi.c
+libagesa-y += cpuF16MmioMap.c
+libagesa-y += cpuF16MsrUnknownTables.c
+libagesa-y += cpuF16PciUnknownTables.c
+libagesa-y += cpuF16Utilities.c
+libagesa-y += cpuF16WheaInitDataTables.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/Makefile.inc
new file mode 100644
index 0000000000..e389c9eefc
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/Makefile.inc
@@ -0,0 +1,20 @@
+libagesa-y += cpuApm.c
+libagesa-y += cpuC6State.c
+libagesa-y += cpuCacheFlushOnHalt.c
+libagesa-y += cpuCacheInit.c
+libagesa-y += cpuCdit.c
+libagesa-y += cpuCoreLeveling.c
+libagesa-y += cpuCpb.c
+libagesa-y += cpuCrat.c
+libagesa-y += cpuDmi.c
+libagesa-y += cpuFeatureLeveling.c
+libagesa-y += cpuFeatures.c
+libagesa-y += cpuHtc.c
+libagesa-y += cpuIoCstate.c
+libagesa-y += cpuPsi.c
+libagesa-y += cpuPstateGather.c
+libagesa-y += cpuPstateLeveling.c
+libagesa-y += cpuPstateTables.c
+libagesa-y += cpuSlit.c
+libagesa-y += cpuSrat.c
+libagesa-y += cpuWhea.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Makefile.inc
new file mode 100644
index 0000000000..e60c7f2f48
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Makefile.inc
@@ -0,0 +1,17 @@
+libagesa-y += S3.c
+libagesa-y += Table.c
+libagesa-y += cahalt.c
+libagesa-y += cahaltasm.S
+libagesa-y += cpuApicUtilities.c
+libagesa-y += cpuBist.c
+libagesa-y += cpuEarlyInit.c
+libagesa-y += cpuEventLog.c
+libagesa-y += cpuFamilyTranslation.c
+libagesa-y += cpuGeneralServices.c
+libagesa-y += cpuLateInit.c
+libagesa-y += cpuMicrocodePatch.c
+libagesa-y += cpuPostInit.c
+libagesa-y += cpuPowerMgmt.c
+libagesa-y += cpuPowerMgmtSingleSocket.c
+libagesa-y += cpuWarmReset.c
+libagesa-y += heapManager.c